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M7040N データシートの表示(PDF) - STMicroelectronics

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M7040N Datasheet PDF : 159 Pages
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M7040N
Figure 4. M7040N Block Diagram
PHS_L
CLK1X_CLK2X
RST_L
CLK_MODE
DQ [71:0]
Comparand Registers[15:0]
Global Mask Registers [15:0]
Information and Command Register
Burst Read Register
Burst Write Register
Next Free Address Register
Search Successful Index Registers [7:0]
(All registers are 72-bit-wide)
TAP
Controller
TAP
CMD [10:0]
CMDV
ACK
EOT
Command
Decode
and PIO Access
ID [4:0]
FULL [6:0]
Full Logic
Cmd Compare/PIO Data
Configurable as
128K x 36
64K x 72
32K x 144
16K x 288
Data Array
Configurable as
128K x 36
64K x 72
32K x 144
16K x 288
Mask Array
Pipeline
and
SRAM
Control
SADR [23:0]
OE_L
WE_L
CE_L
ALE_L
FULL
LHI [6:0]
BHI [2:0]
FULO [1:0]
Arbitration
Logic
LHO [1:0]
BHO [2:0]
SSF
SSV
AI04645
10/159

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