M69KB096AB80CW8 データシートの表示（PDF） - STMicroelectronics

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M69KB096AB80CW8

64 Mbit (4Mb x 16)/ 104MHz Clock Rate 1.8V Supply - Bare Die Burst PSRAM

STMicroelectronics 

M69KB096AB

Figure 2. Block Diagram

1 Summary description

A21-A0

Address Decoder

E

W

Bus Configuration

Register (BCR)

CR

Synchronous/

K

Asynchronous

Logic

Column Decoder

Row

Decoder

4,096K x 16

Memory Array

I/O

Buffers

DQ0-DQ15

WAIT

E

W

G

Control

L

Logic

CR

LB

UB

1. This functional block diagram illustrates simplified device operation.

AI11299

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