AS4C1M16E5-45JC データシートの表示（PDF） - Alliance Semiconductor

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AS4C1M16E5-45JC

5V 1M×16 CMOS DRAM (EDO)

Alliance Semiconductor 

AS4C1M16E5

Hyper page mode cycle

Symbol

tCPWD

tCPA

tRASP

tDOH

tREZ

tWEZ

tOEZ

tHPC

tHPRWC

tRHCP

Parameter

CAS precharge to WE delay time

Access time from CAS precharge

RAS pulse width

Previous data hold time from CAS

Output buffer turn off delay from RAS

Output buffer turn off delay from WE

Output buffer turn off delay from OE

Hyper page mode cycle time

Hyper page mode RMW cycle

RAS hold time from CAS

®

-45

Min Max

45

–

–

28

45 100K

5

–

0

13

0

13

0

13

20

–

47

–

30

–

-50

Min Max

45

–

–

28

50 100K

5

–

0

13

0

13

0

13

20

–

47

–

30

–

-60

Min Max

52

–

–

35

60 100K

5

–

0

15

0

15

0

15

25

–

56

–

35

–

Unit Notes

ns

ns 16

ns

ns

ns

ns

ns

ns

ns

ns

Output enable

Symbol

tCLZ

tROH

tOEA

tOED

tOEZ

tOEH

tOLZ

tOFF

Parameter

CAS to output in Low Z

RAS hold time referenced to OE

OE access time

OE to data delay

Output buffer turnoff delay from OE

OE command hold time

OE to output in Low Z

Output buffer turn-off time

-45

Min Max

0

–

8

–

–

13

13

–

0

13

10

–

0

–

0

13

-50

Min Max

0

–

8

–

–

13

13

–

0

13

10

–

0

–

0

13

-60

Min Max

0

–

10

–

–

15

15

–

0

15

10

–

0

–

0

15

Unit Notes

ns 11

ns

ns

ns

ns 11

ns

ns

ns 11,13

4/11/01; v.1.0

Alliance Semiconductor

P. 7 of 22

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