AS4C256K16F0-50JC データシートの表示（PDF） - Alliance Semiconductor
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AS4C256K16F0-50JC Datasheet PDF : 25 Pages
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AS4C256K16FO
®
Functional description
The AS4C256K16FO is a high-performance 4 megabit CMOS Dynamic Random Access Memory (DRAM) device organized as
262,144 words × 16 bits. The AS4C256K16FO is fabricated with advanced CMOS technology and designed with innovative
design techniques resulting in high speed, extremely low power and wide operating margins at component and system levels.
The AS4C256K16FO features a high-speed page mode operation in which high speed read, write and read-write are performed
on any of the 512 × 16 bits defined by the column address. The asynchronous column address uses an extremely short row
address capture time to ease the system-level timing constraints associated with multiplexed addressing. Output is tri-stated by a
column address strobe (CAS) which acts as an output enable independent of RAS. Very fast CAS to output access time eases
system design.
Refresh on the 512 address combinations of A0–A8 during an 8 ms period is accomplished by performing any of the following:
• RAS-only refresh cycles
• Hidden refresh cycles
• CAS-before-RAS refresh cycles
• Normal read or write cycles
• Self-refresh cycles.*
The AS4C256K16FO is available in standard 40-pin plastic SOJ and 44-pin TSOP II packages compatible with widely available
automated testing and insertion equipment. System level features include single power supply of 5V ± 10% tolerance and direct
interface with TTL logic families.
Logic block diagram
VCC
Column decoder
Data
I/O
I/O0 to I/O15
GND
buffer
Sense amp
A0
A1
A2
RAS
RAS clock
A3
generator
A4
A5
A6
UCAS
CAS clock
generator
A7
A8
LCAS
WE clock
WE
generator
512×512×16
array
(4,194,304)
OE
Substrate
bias generator
Recommended operating conditions
Parameter
Symbol
Min
Supply voltage
VCC
4.5
GND
0.0
Input voltage
VIH
2.4
VIL
–1.0
Typ
Max
Unit
5.0
5.5
V
0.0
0.0
V
–
VCC + 1
V
–
0.8
V
* Self-refresh option is available for new generation device only. Contact Alliance for more information.
4/11/01; V.0.9.1
Alliance Semiconductor
P. 2 of 25
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