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M95080 データシートの表示(PDF) - STMicroelectronics

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M95080 Datasheet PDF : 40 Pages
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M95160, M95080
SUMMARY DESCRIPTION
These electrically erasable programmable memo-
ry (EEPROM) devices are accessed by a high
speed SPI-compatible bus. The memory array is
organized as 2048 x 8 bit (M95160), and 1024 x 8
bit (M95080).
The device is accessed by a simple serial interface
that is SPI-compatible. The bus signals are C, D
and Q, as shown in Table 2. and Figure 2..
The device is selected when Chip Select (S) is tak-
en Low. Communications with the device can be
interrupted using Hold (HOLD).
Figure 2. Logic Diagram
Figure 3. DIP, SO, TSSOP and MLP
Connections (Top View)
M95xxx
S1
Q2
8 VCC
7 HOLD
W3
6C
VSS 4
5D
AI01790D
VCC
D
C
S
W
HOLD
M95xxx
VSS
Q
AI01789C
Note: See PACKAGE MECHANICAL section for package dimen-
sions, and how to identify pin-1.
Table 2. Signal Names
C
Serial Clock
D
Serial Data Input
Q
Serial Data Output
S
Chip Select
W
Write Protect
HOLD
Hold
VCC
Supply Voltage
VSS
Ground
5/40

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