ICPL2731 データシートの表示（PDF） - Isocom
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ICPL2731 Datasheet PDF : 4 Pages
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SWITCHING SPECIFICATIONS AT TA = 25°C ( VCC = 5V Unless otherwise noted )
PARAMETER
SYM DEVICE MIN TYP MAX UNITS
TEST CONDITION
Propagation Delay Time
to Logic Low at Output
( fig 1 )( note 5 )
Propagation Delay Time
to Logic High at Output
( fig 1 )( note 5 )
Common Mode Transient
Immunity at Logic High
Level Output ( fig 2 )( note 9 )
Common Mode Transient
Immunity at Logic Low
Level Output ( fig 2 )( note 8 )
ICPL2731
tPHL ICPL2730/1
ICPL2730/1
ICPL2731
tPLH ICPL2730/1
ICPL2730/1
25 100 µs
0.5 2 µs
4.0 20 µs
20 60 µs
4 10 µs
12 35 µs
CM
H
1000 10000
V/µs
CM
L
-1000 -10000
V/µs
IF = 0.5mA,RL = 4.7kΩ
IF = 12mA,RL = 270Ω
I
F
=
1.6mA,R
L
=
2.2kΩ
I
F
=
0.5mA,R
L
=
4.7kΩ
IF = 12mA,RL = 270Ω
IF = 1.6mA,RL = 2.2kΩ
I = 0mA, V = 10V
F
CM
PP
RL = 2.2kΩ
I = 1.6mA,V = 10V
F
CM
PP
RL = 2.2kΩ
NOTES:-
1. Derate linearly above 70oC free air temperature at a rate of 0.5 mA/°C.
2. Derate linearly above 70oC free air temperature at a rate of 0.9 mW/°C.
3. Derate linearly above 70oC free air temperature at a rate of 0.6 mA/°C.
4. Derate linearly above 35oC free air temperature at a rate of 1.7 mW/°C.
Output power = (Collector output) + (Supply output).
5. Each channel.
6. CURRENT TRANSFER RATIO is defined as the ratio of output collector current,IO , to the forward LED
input current, IF times 100%.
7. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
8. Common mode transient immunity in Logic Low level is the maximum tolerable (negative) dVcm/dt on
the trailing edge of the common mode pulse signal, VCM to assure that the output will remain in Logic
Low state (i.e. VO< 0.8V).Measured in volts per microsecond (V/µs).
9. Common mode transient immunity in Logic High level is the maximum tolerable (positive) dVcm/dt on
the leading edge of the common mode pulse V to assure that the output will remain in a Logic High
CM
state (i.e. VO > 2.0V).Measured in volts per microsecond (V/µs).
10. Device considered a two-terminal device: pins 1,2,3, and 4 shorted together and pins 5,6,7 and 8 shorted
together.
FIG.1 SWITCHING TEST CIRCUIT
IF
0
V
O
t
PHL
1.5V
tPLH
PULSE
GENERATOR I
Z
O
=
50Ω
F
tr = 5ns
10% Duty Cycle
1
5V
1/f < 100µs
2
1.5V
V
OL
3
IF Monitor
4
100Ω
8
5V
7
RL
VO
6
5
C = 15pF
L
7/12/00
DB92018-AAS/A2
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