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MACH120-18JI データシートの表示(PDF) - Lattice Semiconductor
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MACH120-18JI
High-Performance EE CMOS Programmable Logic
Lattice Semiconductor
MACH120-18JI Datasheet PDF : 20 Pages
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SWITCHING WAVEFORMS
Input, I/O, or
Feedback
Registered
Output
Clock
t
ARW
V
T
t
AR
V
T
t
ARR
V
T
Input, I/O,
or Feedback
Registered
Output
Clock
Asynchronous Reset
14129J-11
t
APW
V
T
t
AP
V
T
t
APR
V
T
Asynchronous Preset
14129J-12
Input, I/O, or
Feedback
Outputs
V
T
t
ER
t
EA
V
OH
– 0.5 V
V
T
V
OL
+ 0.5 V
Output Disable/Enable
14129J-13
Notes:
1. V
T
= 1.5 V.
2. Input pulse amplitude 0 V to 3.0 V.
3. Input rise and fall times 2 ns–4 ns typical.
MACH120-12/15
17
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