MACH120-18JI データシートの表示（PDF） - Lattice Semiconductor

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MACH120-18JI

High-Performance EE CMOS Programmable Logic

Lattice Semiconductor 

FUNCTIONAL DESCRIPTION

The MACH120 consists of four PAL blocks connected by a switch matrix. There are 48 I/O pins

and 4 dedicated input pins feeding the switch matrix. These signals are distributed to the four

PAL blocks for efficient design implementation. There are 4 clock pins that can also be used as

dedicated inputs.

The PAL Blocks

Each PAL block in the MACH120 (Figure 1) contains a 48-product-term logic array, a logic allocator,

12 macrocells and 12 I/O cells. The switch matrix feeds each PAL block with 26 inputs. This makes

the PAL block look effectively like an independent “PALCE26V12”.

There are four additional output enable product terms in each PAL block. For purposes of output

enable, the 12 I/O cells are divided into 2 banks of 6 macrocells. Each bank is allocated two of

the output enable product terms.

An asynchronous reset product term and an asynchronous preset product term are provided for

flip-flop initialization. All flip-flops within the PAL block are initialized together.

The Switch Matrix

The MACH120 switch matrix is fed by the inputs and feedback signals from the PAL blocks. Each

PAL block provides 12 internal feedback signals and 12 I/O feedback signals. The switch matrix

distributes these signals back to the PAL blocks in an efficient manner that also provides for high

performance. The design software automatically configures the switch matrix when fitting a design

into the device.

The Product-Term Array

The MACH120 product-term array consists of 48 product terms for logic use, and 6 special-purpose

product terms. Four of the special-purpose product terms provide programmable output enable, one

provides asynchronous reset, and one provides asynchronous preset. Two of the output enable

product terms are used for the first six I/O cells; the other two control the last six macrocells.

The Logic Allocator

The logic allocator in the MACH120 takes the 48 logic product terms and allocates them to the

12 macrocells as needed. Each macrocell can be driven by up to 12 product terms. The design

software automatically configures the logic allocator when fitting the design into the device.

Table 1 illustrates which product term clusters are available to each macrocell within a PAL

block. Refer to Figure 1 for cluster and macrocell numbers.

Table 1. Logic Allocation

Output Macrocell

M0

M1

M2

M3

M4

M5

Available

Clusters

C0, C1

C0, C1, C2

C1, C2, C3

C2, C3, C4

C3, C4, C5

C4, C5, C6

Output Macrocell

M6

M7

M8

M9

M10

M11

Available

Clusters

C5, C6, C7

C6, C7, C8

C7, C8, C9

C8, C9, C10

C9, C10, C11

C10, C11

MACH120-12/15

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