MACH4-96/96-18 データシートの表示（PDF） - Lattice Semiconductor

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MACH4-96/96-18

High-Performance EE CMOS Programmable Logic

Lattice Semiconductor 

Lattice Semiconductor

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FINAL

COM’L: -15

MACH 4 FAMILY

IND: -18

MACH4-96/96-15

High-Performance EE CMOS Programmable Logic

DISTINCTIVE CHARACTERISTICS

x 144 Pins in PQFP

x 96 Macrocells

x 15 ns tPD Commercial, 18 ns tPD Industrial

x 47.6 MHz fCNT

x 102 Inputs with pull-up resistors

x 96 I/Os; 4 dedicated inputs/clocks; 2 dedicated inputs

x 96 Flip-flops

x Up to 20 product terms per macrocell, with XOR

x Flexible clocking

— Four global clock pins with selectable edges

— Asynchronous mode available for each macrocell

x 3 MACH111SP-size blocks

x SpeedLocking™ for guaranteed fixed timing

x JTAG, 5-V, in-system programmable

x JTAG (IEEE 1149.1) boundary scan testing capability

x Input and output switch matrices for high routability

PLEASE NOTE: The MACH4-96/96 (M4-96/96) reflects a new nomenclature for the MACH® 4 Family.

This device is currently dual-marked with the MACH355 ordering part number. The dual-mark

scheme will facilitate design and manufacturing flows until we have completely phased in the new

M4-96/96 nomenclature. Please use the MACH355 data sheet (PID# 17467) as a reference.

GENERAL DESCRIPTION

The MACH4-96/96 (M4-96/96) is a member of Vantis’ high-performance EE CMOS MACH 4 family.

This device has approximately three times the macrocell capability of the popular MACH111SP,

with significant additional density and functional features.

The M4-96/96 consists of six PAL® blocks interconnected by a programmable central switch matrix.

The central switch matrix connects the PAL blocks to each other and to all input pins, providing a

high degree of connectivity between the PAL blocks. This allows designs to be placed and routed

efficiently. Routability is further enhanced by an input switch matrix and an output switch matrix.

The input switch matrix provides input signals with alternative paths into the central switch matrix;

the output switch matrix provides flexibility in assigning macrocells to I/O pins.

Publication# 21535 Rev: A

Amendment/+1

Issue Date: November 1997

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