MACH220-10JC データシートの表示（PDF） - Advanced Micro Devices
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MACH220-10JC Datasheet PDF : 33 Pages
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AMD
CAPACITANCE (Note 1)
Parameter
Symbol
Parameter Description
CIN
Input Capacitance
COUT
Output Capacitance
Test Conditions
VIN = 2.0 V
VCC = 5.0 V, TA = 25°C,
VOUT = 2.0 V f = 1 MHz
Typ Unit
6
pF
8
pF
SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges (Note 2)
Parameter
Symbol Parameter Description
-12
-15
-20
Min Max Min Max Min Max Unit
tPD
Input, I/O, or Feedback to Combinatorial Output (Note 3)
12
15
20 ns
D-type
7
tS
Setup Time from Input, I/O, or Feedback to Clock
T-type
8
10
13
ns
11
14
ns
tH
Register Data Hold Time
0
0
0
ns
tCO
Clock to Output (Note 3)
8
10
12 ns
tWL
Clock Width
tWH
LOW
6
6
8
ns
HIGH
6
6
8
ns
External Feedback 1/(tS + tCO)
Maximum
D-type
T-type
66.7
62.5
fMAX
Frequency
(Note 1)
Internal Feedback (fCNT)
D-type
T-type
83.3
76.9
50
47.6
66.6
62.5
40
MHz
38.5
MHz
50
MHz
47.6
MHz
No Feedback
1/(tWL + tWH)
tSL
Setup Time from Input, I/O, or Feedback to Gate
83.3
83.3
62.5
MHz
7
10
13
ns
tHL
Latch Data Hold Time
0
0
0
ns
tGO
Gate to Output (Note 3)
10
11
12 ns
tGWL Gate Width LOW
6
6
8
ns
tPDL Input, I/O, or Feedback to Output Through Transparent
Input or Output Latch
14
17
22 ns
tSIR
Input Register Setup Time
2
2
2
ns
tHIR
Input Register Hold Time
2
2.5
3
ns
tICO Input Register Clock to Combinatorial Output
tICS
Input Register Clock to Output Register Setup
D-type
15
18
12
15
23 ns
20
ns
T-type 13
16
21
ns
tWICL
tWICH
Input Register Clock Width
LOW
6
6
8
ns
HIGH
6
6
8
ns
fMAXIR Maximum Input Register Frequency 1/(tWICL + tWICH)
83.3
83.3
62.5
MHz
tSIL
Input Latch Setup Time
2
2
2
ns
tHIL
Input Latch Hold Time
2
2.5
3
ns
tIGO Input Latch Gate to Combinatorial Output
17
20
25 ns
tIGOL Input Latch Gate to Output Through Transparent
Output Latch
19
22
27 ns
tSLL Setup Time from Input, I/O, or Feedback Through
Transparent Input Latch to Output Latch Gate
9
12
15
ns
tIGS
Input Latch Gate to Output Latch Setup
13
16
21
ns
12
MACH220-12/15/20 (Com’l)
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