MAX1740 データシートの表示（PDF） - Maxim Integrated

部品番号

コンポーネント説明

メーカー

MAX1740

SIM/Smart Card Level Translators in µMAX

Maxim Integrated 

SIM/Smart Card Level Translators

in µMAX

All level translation is valid for DVCC ≥ VCC or DVCC ≤

VCC. The MAX1740/MAX1741 contain internal pull-up

resistors from DATA to the controller-side supply

(DVCC) and from IO to the card-side supply (VCC). For

push-pull controller outputs, see the Data Driver section

for bidirectional data translation.

Data Driver (MAX1741 only)

When using a microcontroller (µC) without an open-drain

output, use the data driver (DDRV) input to send data to

the SIM/smart card, while DATA provides the controller-

side output for bidirectional data transfer. When not

used, connect DDRV to DVCC to reduce total supply cur-

rent.

Shutdown Mode

For the MAX1740, drive SHDN low to activate shut-

down. Connect SHDN to DVCC or drive high for normal

operation. To allow for card insertion and removal, shut-

down mode actively pulls CLK, RST, and IO low; it also

disconnects the internal 10kΩ pull-up resistor from VCC

to prevent excessive current draw. Shutdown mode

reduces the total supply current (IDVCC + IVCC) to

0.01µA.

SIM/Smart Card Insertion/Removal

The SIM/smart card specifications require that the

card-side pins (VCC, CLK, RST, IO) be at ground

potential prior to inserting the SIM/smart card. For

applications using the MAX1686H (Figure 4), the easi-

est way to achieve this is by shutting down the

MAX1686H or by driving SHDN (MAX1740 only) low. If

specific sequencing is desired, pull IO low by driving

either DATA or DDRV (MAX1741 only) low, and pull

CLK and RST low by driving CIN and RIN low, respec-

tively.

ESD Protection

As with all Maxim devices, ESD-protection structures

on all pins protect against electrostatic discharges

(ESDs) encountered during handling and assembly.

For further protection during card insertion and

removal, the pins that connect to the card socket (CLK,

RST, IO, VCC, and GND) provide protection against

±10kV of ESD, according to the Human Body Model.

The ESD structures withstand high ESD in all states:

normal operation, shutdown, and power-down. After an

ESD event, the MAX1740/MAX1741 continue working

without latchup.

ESD Test Conditions

ESD performance depends on a variety of conditions.

Contact Maxim for a reliability report documenting test

setup, test methodology, and test results.

Human Body Model

Figure 3a shows the Human Body Model, and Figure

3b shows the current waveform it generates when dis-

charged into a low impedance. This model consists of

a 100pF capacitor charged to the ESD voltage of inter-

DVCC

SYSTEM

CONTROLLER

DVCC

DVCC

RIN

1µF

CIN

20k

DATA

VCC

RST

CLK

10k

IO

VCC

VCC

RST

1µF

CLK

SIM OR

SMART CARD

IO

OPTIONAL SHDN*

OPTIONAL DDRV*

GND

SHUTDOWN

CONTROL

MAX1740

MAX1741

GND

GND

* SHDN FOR MAX1740 ONLY

DDRV FOR MAX1741 ONLY

Figure 2. Typical Application Circuit and Functional Diagram

8 _______________________________________________________________________________________

Share Link: