MAX3625 データシートの表示（PDF） - Maxim Integrated
部品番号
コンポーネント説明
メーカー
MAX3625 Datasheet PDF : 10 Pages
| |||
Low-Jitter, Precision Clock Generator
with Three Outputs
PIN
1, 24
2
3
4
5
6
7
8
9
10
11
12, 13
14
15
16
17
18
19
20
21
22
23
Pin Description
NAME
SELB0,
SELB1
BYPASS
MR
VCCO_A
QA
QA
QB_OE
QA_OE
FB_SEL
VCCA
VCC
SELA0,
SELA1
GND
X_OUT
X_IN
REF_IN
IN_SEL
QB1
QB1
QB0
QB0
VCCO_B
FUNCTION
LVCMOS/LVTTL Inputs. Control NB divider setting. Has 50kΩ input impedance. See Table 2 for more
information.
LVCMOS/LVTTL Input (Active Low). Connect low to bypass the internal PLL. Connect high or leave open
for normal operation. When in bypass mode the output dividers are set to divide by 1. Has internal 75kΩ
pullup to VCC.
LVCMOS/LVTTL Input. Master reset input. Pulse high for > 1µs to reset all dividers. Has internal 75kΩ
pulldown to GND. Not required for normal operation.
Power Supply for QA Clock Output. Connect to +3.3V.
Noninverting Clock Output, LVPECL
Inverting Clock Output, LVPECL
LVCMOS/LVTTL Input. Enables/disables QB clock outputs. Connect pin high or leave open to enable
LVPECL clock outputs QB0 and QB1. Connect low to set QB0 and QB1 to a logic 0. Has internal 75kΩ
pullup to VCC.
LVCMOS/LVTTL Input. Enables/disables the QA clock output. Connect this pin high or leave open to
enable the LVPECL clock output QA. Connect low to set QA to a logic 0. Has internal 75kΩ pullup to VCC.
LVCMOS/LVTTL Input. Controls M divider setting. See Table 3 for more information. Has internal 75kΩ
pulldown to GND.
Analog Power Supply for the VCO. Connect to +3.3V. For additional power-supply noise filtering, this pin
can connect to VCC through 10.5Ω as shown in Figure 1 (requires VCC = 3.3V ±5%).
Core Power Supply. Connect to +3.3V.
LVCMOS/LVTTL Inputs. Control NA divider setting. See Table 2 for more information. 50kΩ input
impedance.
Supply Ground
Crystal Oscillator Output
Crystal Oscillator Input
LVCMOS Reference Clock Input. Self-biased to allow AC- or DC-coupling.
LVCMOS/LVTTL Input. Connect high or leave open to use a crystal. Connect low to use REF_IN. Has
internal 75kΩ pullup to VCC.
LVPECL, Inverting Clock Output
LVPECL, Noninverting Clock Output
LVPECL, Inverting Clock Output
LVPECL, Noninverting Clock Output
Power Supply for QB0 and QB1 Clock Output. Connect to +3.3V.
_______________________________________________________________________________________ 5
Share Link: 