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MAX550A データシートの表示(PDF) - Maxim Integrated

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MAX550A Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
+2.5V to +5.5V, Low-Power, Single/Dual,
8-Bit Voltage-Output DACs in µMAX Package
_____________________________Typical Operating Characteristics (continued)
(VDD = VREF = 2.5V, RL = 1M, CL = 15pF, TA = +25°C, unless otherwise noted.)
OUTPUT GLITCH FILTERING
CODE = 00 hex
SETTLING TIME (RISING)
DAC CODE 00 hex to FF hex
5µs/div
OUT, 50mV/div, CL = 0pF
OUT, 50mV/div, CL = 100pF
OUT, 50mV/div, CL = 220pF
OUT, 50mV/div, CL = 1000pF
CS, 5V/div
2µs/div
OUT, 1V/div
CS, 5V/div
______________________________________________________________Pin Description
MAX548A
1
2
PIN
MAX549A
1
2
MAX550A
1
2
3
3
3
4
4
4
5
5
5
6
6
7
6
7
7
8
8
8
NAME
GND
OUTA
OUT
CS
DIN
SCLK
LDAC
OUTB
REF
VDD
FUNCTION
Ground
DAC A Output Voltage
DAC Output Voltage
Chip-Select Input. A logic low on CS enables serial data to be
clocked into the input shift register. Programming commands are
executed at CS’s rising edge.
Serial-Data Input. Data is clocked into the 16-bit input shift register on
SCLK’s rising edge.
Serial-Clock Input. Data is clocked in on SCLK’s rising edge.
Load DAC Input. After CS goes high and if programmed by the
control word, a falling edge on LDAC updates the DAC latch(es).
Connect LDAC to VDD if unused.
DAC B Output Voltage
External Reference Voltage Input for DAC(s)
Positive Power Supply (+2.5V to +5.5V)
_______________________________________________________________________________________ 5

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