MAX848 データシートの表示（PDF） - Maxim Integrated

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MAX848

1-Cell to 3-Cell, High-Power, Low-Noise, Step-Up DC-DC Converters

Maxim Integrated 

1-Cell to 3-Cell, High-Power,

Low-Noise, Step-Up DC-DC Converters

VIN = 1.1V

10Ω

OUT

*

POUT

R3

100k

C2

0.1µF

MAX849

GND

POK

ON1

C5

0.1µF

ON2

LX

CLK/SEL PGND

C3

FB

0.22µF

POKIN

REF

Figure 2. 3.3V Preset Output

D1

MBR0520L

L1

10µH

3.3V @

200mA

C4

2 x 100µF

C1

22µF

* HEAVY LINES INDICATE

HIGH-CURRENT PATH.

Table 2. Selecting Operating Mode

CLK/SEL

0

1

External clock

(200kHz ~ 400kHz)

MODE

PFM

PWM

Synchronized PWM

Low-Power PFM Mode

When CLK/SEL is pulled low, the MAX848/MAX849 oper-

ate in low-power, low-supply-current PFM mode. Pulse-

frequency modulation provides the highest efficiency at

light loads. The P-channel rectifier is turned off to reduce

gate-charge losses, and the regulator operates in dis-

continuous mode. The N-channel power MOSFET is kept

on until the inductor current ramps to 30% of the current

limit. The inductor energy is delivered to the output

capacitor when the switch turns off. A new cycle is inhib-

ited until the inductor current crosses zero. Zero current

detection is accomplished by sensing the LX voltage

crossing the output voltage. Figure 3 shows the block

diagram for the PFM controller.

Low-Noise PWM Mode

When CLK/SEL is pulled high, the MAX848/MAX849

operate in high-power, low-noise, current-mode PWM,

switching at the 300kHz nominal internal oscillator fre-

quency. The internal rectifier is active in this mode,

and the regulator operates in continuous mode. The

N-channel power MOSFET turns on until either the output

voltage is in regulation or the inductor current limit is

reached (0.8A for the MAX848 and 1.4A for the

MAX849). The switch turns off for the remainder of the

cycle and the inductor energy is delivered to the output

FEEDBACK

REF

PFM-MODE

CURRENT-

LIMIT LEVEL

QD

R

LOGIC HIGH

POUT

SQ

R

CURRENT

SENSE

LX

N

PGND

Figure 3. Controller Block Diagram in PFM Mode

capacitor. A new cycle is initiated on the next oscillator

cycle. In low-noise applications, the fundamental and the

harmonics generated by the fixed switching frequency

can easily be filtered. Figure 4 shows the block diagram

for the PWM controller.

The MAX848/MAX849 enter synchronized current-mode

PWM when a clock signal (200kHz < fCLK < 400kHz) is

applied to CLK/SEL. The internal synchronous rectifier

is active and the switching frequency is synchronized

to the externally applied clock signal. For wireless

applications, this ensures that the harmonics of the

switching frequencies are predictable and can be kept

outside the IF band(s). High-frequency operation per-

mits low-magnitude output ripple voltage.

The MAX848/MAX849 are capable of providing a stable

output even with a rapidly pulsing load (GSM, DECT),

such as from a transmitter power amplifier in digital cord-

less phones (see Typical Operating Characteristics).

In PWM mode, the use of the synchronous rectifier

ensures constant-frequency operation, regardless of

the load current.

Setting the Output Voltage Externally

The MAX848/MAX849 feature Dual Mode operation.

The output voltage is preset to 3.3V (FB = 0V), or it can

be adjusted from 2.7V to 5.5V with external resistors

R1, R2, and R3, as shown in Figure 5. To set the output

voltage externally, select resistor R3 in the 10kΩ to

100kΩ range. The values for R1 and R2 are given by:

R2 = R3(VOUT / VTRIP - 1)

R1 = (R3 + R2)(VTRIP / VREF - 1)

10 ______________________________________________________________________________________

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