High-Precision Clock Generators
with Integrated VCXO
DC ELECTRICAL CHARACTERISTICS (continued)
(VDDA = VDD = VDDQ = 2.4V to 3.6V, and VDDQ = 1.4V to 1.6V for MAX9451, TA = -40°C to +85°C. Typical values at VDDA = VDD =
VDDQ = 3.3V, and VDDQ = 1.5V for MAX9451, TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Output Offset Voltage
VOS
Change in VOS Between
Complementary Output States
∆VOS
Output Short-Circuit Current
IOS Two output pins connected to GND
SERIAL INTERFACE INPUT, OUTPUT (SCL, SDA, CS)
Input High Level
VIH
Input Low Level
Input Leakage Current
Output Low Level
Input Capacitance
POWER CONSUMPTION
VDD and VDDA Supply Current
VDDQ Supply Current
VIL
IIL
VOL 3mA sink current
CI
ICC1
ICC2
Output clock
frequency =
155MHz
Output clock
frequency =
155MHz (MAX9450)
MAX9450
MAX9451
MAX9452
MAX9450
MAX9451
MAX9452
1.05
1.2
1.35
V
10
35
mV
-7.5
- 15
mA
0.7
x VDD
V
0.3
V
x VDD
-1
+1
µA
0.4
V
10
pF
55
85
70
94
mA
65
88
55
80
65
80
mA
14
25
AC ELECTRICAL CHARACTERISTICS
(VDDA = VDD = VDDQ = 2.4V to 3.6V, and VDDQ = 1.4V to 1.6V for MAX9451, TA = -40°C to +85°C. |VID| = 200mV, VCOM = |VID / 2| to
2.4 - |VID / 2|. Typical values at VDDA = VDD = VDDQ = 3.3V and VDDQ = 1.5V for MAX9451, TA = +25°C. CL = 10pF, clock output =
155.5MHz and clock input = 19.44MHz, unless otherwise noted.) (Note 1)
PARAMETER
CLK OUTPUTS (CLK0, CLK1)
Reference Input Frequency
Output Frequency
VCXO Pulling Range
Output-to-Output Skew
Rise Time
Fall Time
Duty Cycle
Period Jitter (RMS)
Phase Noise
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
fIN
fOUT
tSKO
tR
tF
TJ
Measured at IN0 or IN1
Measured at CLK0 or CLK1
CL = 8pF (Note 2)
Skew between CLK0 and CLK1
(MAX9450 and MAX9452)
Skew between CLK0 and CLK1 (MAX9451)
20% to 80% of output swing
80% to 20% of output swing
Measured at the band 12kHz to 20MHz
1kHz offset
10kHz offset
100kHz offset
1MHz offset
0.008
15
43
50
55
0.4
0.4
0.8
-70
-110
-130
-140
500
160
±60
90
106
0.590
0.590
56
MHz
MHz
ppm
ps
ns
ns
%
ps
dBc
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