MAX9742 データシートの表示（PDF） - Maxim Integrated
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MAX9742 Datasheet PDF : 36 Pages
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Single-/Dual-Supply, Stereo 16W,
Class D Amplifier with Differential Inputs
ELECTRICAL CHARACTERISTICS—Single-Supply, BTL Configuration
(VDD = 24V, VSS = VSUB = LGND = 0V, VSHDN = 3.3V, VMID = 12V, CVDD = 660µF, CMID1 = 10µF, CMID2 = 10µF, R1 = R2 = R3 =
10kΩ, CSFT = 0.47µF, COUT = 1000µF, CFB_1 = 150pF, CFB_2 = 10pF, CBOOT = 0.1µF, CREGP = CREGM = 1µF, RIN_ = 30.1kΩ, RF1A
= 121kΩ, RF1B = 562kΩ, RF2 = 681kΩ, RREF = 68kΩ, RL = ∞, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA =
+25°C.) (Note 2)
PARAMETER
Output Offset Voltage
Power-Supply Rejection Ratio
(Note 4)
Continuous Output Power
SYMBOL
PSRR
POUT
CONDITIONS
(Note 4)
VDD = 20V to 40V
VDD = 24V + 500mVP-P, f = 1kHz
RL = 8Ω, fIN = 1kHz, THD+N = 10%,
(Notes 6, 10, and 11)
MIN TYP MAX UNITS
7
mV
88
dB
77
32
W
Efficiency
RL = 8Ω, POUT = 10W, THD+N = 10%,
(Notes 5 and 6)
83
%
Total Harmonic Distortion Plus
Noise (Notes 6, 10, and 11)
Signal-to-Noise Ratio
Shutdown-to-Full Operation
Click-and-Pop
THD+N
SNR
tSON
KCP
fIN = 1kHz, BW = 22Hz to 22kHz,
RL = 8Ω, POUT = 10W
POUT = 32W, RL = 8Ω,
BW = 22Hz to 22kHz
(Notes 6, 10, and 11)
Unweighted
A-weighted
Peak voltage, 32-samples
per second, A-weighted
(Notes 4, 11, and 12)
Into shutdown
Out of shutdown
0.08
%
90
dB
96
68
ms
-47
dBV
-32
Note 2: All devices are 100% production tested at +25°C. All temperature limits are guaranteed by design.
Note 3: Supply pumping may occur at high output powers with low audio frequencies. Use proper supply bypassing to prevent the
device from entering overvoltage protection due to supply pumping. See the Supply Pumping Effects and the Supply
Undervoltage and Overvoltage Protection sections.
Note 4: Amplifier inputs AC-coupled to ground.
Note 5: For RL = 4Ω, LF = 22µH and CF = 0.68µF. For RL = 6Ω, LF = 33µH and CF = 0.47µF. For RL = 8Ω, LF = 47µH and CF =
0.33µF.
Note 6: Testing performed with four-layer PCB.
Note 7: Both channels driven in phase.
Note 8: Testing performed with an 8Ω resistor connected between LC filter output and ground. Mode transitions are controlled by
SHDN. KCP level is calculated as 20log[(peak voltage during mode transition, no input signal) / 1VRMS].
Note 9: Digital input specifications apply to both single-supply and dual-supply operation.
Note 10: Channels driven 180° out-of-phase. Load connected between LC filter outputs.
Note 11: LF = 22µH and CF = 0.68µF.
Note 12: Testing performed with an 8Ω resistor connected between LC filter outputs. Mode transitions are controlled by SHDN. KCP
level is calculated as 20log[(peak voltage during mode transition, no input signal) / 1VRMS].
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