MB89T625PFM データシートの表示（PDF） - Fujitsu
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MB89T625PFM Datasheet PDF : 61 Pages
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MB89620 Series
s PRODUCT LINEUP
Part number
Parameter
MB89623
MB89625
MB89626
MB89627
MB89P625 MB89P627 MB89T623
MB89W625 MB89W627 MB89V623
MB89T625
MB89V625
MB89PV620
Classification
Mass production products
(mask ROM products)
One-time PROM
products/EPROM
products
External ROM
products/For
evaluation and
development
Piggyback/
evaluation
product for
evaluation
and
development
ROM size
8K×8
bits
(internal
mask
ROM)
16 K × 8
bits
(internal
mask
ROM)
24 K × 8
bits
(internal
mask
ROM)
32 K × 8
bits
(internal
mask
ROM)
16 K × 8 bits 32 K × 8 bits
(internal
(internal
PROM,
PROM,
programming programming
with
with
general-
general-
purpose
purpose
EPROM EPROM
programmer) programmer)
External ROM
32 K × 8 bits
(external
ROM)
RAM size
256 × 8 512 × 8 768 × 8 1 K × 8 512 × 8 1 K × 8 256 × 8 512 × 8
bits
bits
bits
bits
bits
bits
bits
bits
1K × 8
bits
CPU functions
Number of instructions:
Instruction bit length:
Instruction length:
Data bit length:
Minimum execution time:
Interrupt processing time:
136
8 bits
1 to 3 bytes
1, 8, 16 bits
0.4 µs /10 MHz
3.6 µs/10 MHz
Ports
Input ports:
Output ports (N-ch open-drain):
I/O ports (N-ch open-drain)
Output ports (CMOS):
I/O ports (CMOS):
Total:
5 (4 ports also serve as peripherals.)
8 (All also serve as peripherals.)
8 (4 ports also serve as peripherals.)
8 (All also serve as bus control pins.)
24 (All also serve as bus pins or peripherals.)
53
8-bit PWM
timer
8-bit reload timer operation (toggled output capable, operating clock cycle: 0.4 µs to 3.3 ms)
8-bit resolution PWM operation (conversion cycle: 102 µs to 839 ms)
8-bit pulse
width count
timer
8-bit timer operation (overflow output capable, operating clock cycle: 0.4 to 12.8 µs)
8-bit reload timer operation (toggled output capable, operating clock cycle: 0.4 to 12.8 µs)
8-bit pulse width measurement operation
(Continuous measurement “H” pulse width/“L” pulse width/from ↑ to ↑/from ↓ to ↓ capable)
16-bit timer/
counter
16-bit timer operation (operating clock cycle: 0.4 µs)
16-bit event counter operation (Rising/falling/both edges selectability)
8-bit serial I/O 1,
8-bit serial I/O 2
8 bits
LSB first/MSB first selectability
One clock selectable from four transfer clocks
(one external shift clock, three internal shift clocks: 0.8 µs, 3.2 µs, 12.8 µs)
8-bit A/D
converter
8-bit resolution × 8 channels
A/D conversion mode (conversion time: 18 µs)
Sense mode (conversion time: 5 µs)
Continuous activation by an external activation or an internal timer capable
Reference voltage input
(Continued)
3
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