MB89850R データシートの表示（PDF） - Fujitsu

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MB89850R

8-bit Proprietary Microcontroller

Fujitsu 

s BLOCK DIAGRAM

X0

X1

RST

Oscillator

Clock controller

Reset circuit

(WDT)

P00/AD0

8

to P07/AD7

P10/A08

8

to P17/A15

MOD0

MOD1

P27/ALE

P26/RD

P25/WR

P24/CLK

P23/RDY

P22/HRQ

P21/HAK

P20/BUFC

CMOS I/O port

External bus

interface

CMOS output port

RAM

F2MC-8L

CPU

Other pins

VCC , VSS × 2

ROM

Part number

MB89855R

MB89W857/P857

RAM size

512 bytes

1 Kbyte

ROM size

16 Kbytes

32 Kbytes

(EPROM)

MB89850R Series

Timebase timer

8-bit PWM timer 2

P37/PTO2

8-bit PWM timer 1

P36/PTO1

8-bit serial I/O

UART

P35/SI2

P34/SO2

P33/SCK2

P32/SI1

P31/SO1

P30/SCK1

CMOS I/O port

CMOS I/O port

6

Timer unit

(Dead-time timer)

P47/TRGI

P46/Z

P45/Y

P44/X

P43/RTO3/W

P42/RTO2/V

P41/RTO1/U

P40/RTO0

4

External interrupt

Input port

8

10-bit A/D converter

P64/DTTI

3

P60/INT0

to P62/INT2

P63/INT3/ADST

AVR

AVCC

AVSS

8

P50/AN0

to P57/AN7

N-ch open-drain output port

15

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