MB90340E データシートの表示（PDF） - Fujitsu
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コンポーネント説明
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MB90340E Datasheet PDF : 84 Pages
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MB90340E Series
Pin No.
QFP100*1 LQFP100*2
Pin name
61
62
63
64
65
66
67 to 70
71 to 74
75
76
59
60
61
62
63
64
65 to 68
69 to 72
73
74
P84
SCK0
INT15R
P85
SIN1
P86
SOT1
P87
SCK1
VCC
VSS
P90 to P93
PPG1, 3, 5, 7
P94 to P97
OUT0 to
OUT3
PA0
RX0
INT8R
PA1
TX0
77 to 84
P00 to P07
75 to 82
AD00 to AD07
INT8 to INT15
85
83
P10
AD08
TIN1
I/O
Circuit
type*3
F
M
F
F
⎯
⎯
F
F
F
F
G
G
Function
General purpose I/O pin.
Clock I/O pin for UART0
External interrupt request input pin
General purpose I/O pin.
Serial data input pin for UART1
General purpose I/O pin.
Serial data output pin for UART1
General purpose I/O pin.
Clock I/O pin for UART1
Power (3.5 V to 5.5 V) input pin
GND pin
General purpose I/O pins
Output pins for PPGs
General purpose I/O pins
Waveform output pins for output compares. This function is
enabled when the OCU enables waveform output.
General purpose I/O pin.
RX input pin for CAN0 Interface
External interrupt request input pin
General purpose I/O pin.
TX Output pin for CAN0
General purpose I/O pins. The register can be set to select
whether to use a pull-up resistor. This function is enabled in
single-chip mode.
I/O pins for 8 lower bits of the external address/data bus.
This function is enabled when the external bus is enabled.
External interrupt request input pins.
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
I/O pin for the external address/data bus.
This function is enabled when the external bus is enabled.
Event input pin for the reload timer
(Continued)
15
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