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MB90570A データシートの表示(PDF) - Fujitsu

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MB90570A Datasheet PDF : 120 Pages
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MB90570A/570C Series
PIN DESCRIPTION
Pin no.
LQFP *1
QFP *2
92,93
74,73
Pin name
X0,X1
X0A,X1A
89 to 87 MD0 to MD2
90
RST
86
HST
Circuit
type
A
B
C
C
C
P00 to P07
95 to 102
D
AD00 toAD07
P10 to P17
103 to 110
D
AD08 toAD15
P20 to P27
111 to 118
E
A16 to A23
P30
120
E
ALE
P31
1
E
RD
P32
2
E
WRL
P33
3
E
WRH
P34
4
E
HRQ
P35
5
E
HAK
P36
6
E
RDY
*1 : FPT-120P-M24
*2 : FPT-120P-M13, FPT-120P-M21
Function
High speed oscillator pins
Low speed oscillator pins
These are input pins used to designate the operating mode. They
should be connected directly to Vcc or Vss.
Reset input pin
Hardware standby input pin
In single chip mode, these are general purpose I/O pins. When set for
input, they can be set by the pull-up resistance setting register
(RDR0). When set for output, this setting will be invalid.
In external bus mode, these pins function as address low output/data
low I/O pins.
In single chip mode, these are general purpose I/O pins. When set for
input, they can be set by the pull-up resistance setting register
(RDR1). When set for output, the setting will be invalid.
In external bus mode, these pins function as address middle output/
data high I/O pins.
In single chip mode this is a general-purpose I/O port.
In external bus mode, these pins function as address high output
pins.
In single chip mode this is a general-purpose I/O port.
In external bus mode, this pin functions as the address latch enable
signal output pin.
In single chip mode this is a general-purpose I/O port.
In external bus mode, this pin functions as the read strobe signal out-
put pin.
In single chip mode this is a general-purpose I/O port.
In external bus mode, this pin functions as the data bus lower 8-bit
write strobe signal output pin.
In single chip mode this is a general-purpose I/O port.
In external bus mode, this pin functions as the data bus upper 8-bit
write strobe signal output pin.
In single chip mode this is a general-purpose I/O port.
In external bus mode, this pin functions as the hold request signal in-
put pin.
In single chip mode this is a general-purpose I/O port.
In external bus mode, this pin functions as the hold acknowledge sig-
nal output pin.
In single chip mode this is a general-purpose I/O port.
In external bus mode, this pin functions as the ready signal input pin.
(Continued)
8
DS07-13701-9E

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