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MB90F48 データシートの表示(PDF) - Fujitsu

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MB90F48 Datasheet PDF : 113 Pages
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MB90480/485 Series
s PIN DESCRIPTIONS
Pin No.
Pin name
LQFP*1 QFP*2
Circuit
type
Function
80
82
X0
A
Oscillator pin
81
83
X1
A
Oscillator pin
78
80
X0A
A
32 kHz oscillator pin
77
79
X1A
A
32 kHz oscillator pin
75
77
RST
B
Reset input pin
P00 to P07
83 to 90 85 to 92 AD00 to
AD07
C
(CMOS)
This is a general purpose I/O port. A setting in the pull-up resistance
setting register (RDR0) can be used to apply pull-up resistance (RD00-
RD07 = “1”) . (Disabled when pin is set for output.)
In multiplex mode, these pins function as the external address/data bus
low I/O pins.
D00 to D07
In non-multiplex mode, these pins function as the external data bus low
output pins.
91 to 98
93 to
100
P10 to P17
AD08 to
AD15
C
(CMOS)
This is a general purpose I/O port. A setting in the pull-up resistance
setting resister (RDR1) can be used to apply pull-up resistance (RD10-
RD17 = “1”) . (Disabled when pin is set for output.)
In multiplex mode, these pins function as the external address/data bus
high I/O pins.
D08 to D15
In non-multiplex mode, these pins function as the external data bus high
output pins.
P20 to P23
This is a general purpose I/O port. When the bits of external
address output control register (HACR) are set to "1" in external bus
mode, these pins function as general purpose I/O ports.
99,
100,
1,2
1 to 4
A16 to A19
E
(CMOS/H)
When the bits of external address output control register (HACR) are set
to "0" in multiplex mode, these pins function as address high output pins
(A16-A19).
A16 to A19
When the bits of external address output control register (HACR) are set
to "0" in non-multiplex mode, these pins function as address high output
pins (A16-A19).
P24 to P27
This is a general purpose I/O port. When the bits of external address
output control register (HACR) are set to "1" in external bus mode, these
pins function as general purpose I/O ports.
3 to 6
5 to 8
A20 to A23
A20 to A23
When the bits of external address output control register (HACR) are set
to "0" in multiplex mode, these pins function as address high output pins
E
(A20-A23).
(CMOS/H)
When the bits of external address output control register (HACR) are set
to "0" in non-multiplex mode, these pins function as address high output
pins (A20-A23).
PPG0 to
PPG3
PPG timer output pins.
P30
This is a general purpose I/O port.
7
9
A00
E
(CMOS/H)
In non-multiplex mode, this pin functions as an external address pin.
AIN0
8/16-bit up/down timer input pin (channel 0) .
(Continued)
8

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