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MB91245 データシートの表示(PDF) - Fujitsu

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MB91245
Fujitsu
Fujitsu Fujitsu
MB91245 Datasheet PDF : 84 Pages
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MB91245/S Series
(Continued)
• Interrupt (PC/PS save) : 6 cycles (16 priority levels)
• Harvard architecture allowing program access and data access to be executed simultaneously.
• Instruction set compatible with FR family
Internal Peripheral Functions
• Internal ROM size & ROM type
MASK ROM
: 256 Kbytes (MB91248/S) / 128 Kbytes (MB91247/S)
Flash Memory : 256 Kbytes (MB91F248/S) / 512 Kbytes (MB91F249/S)
• Internal RAM size : 16 Kbytes (MB91248/S, MB91F248/S) / 8 Kbytes (MB91247/S) / 24 Kbytes (MB91F249/S) /
32 Kbytes (MB91V245A)
• General-purpose ports : up to 120 ports (includes 4 input-only ports)
• 8/10-bit A/D converter (Sequential comparison type)
8/10-bit resolution : 32 channels
Conversion time : 3 μs (16/32 MHz)
Set the PLL multiplier and the division ratio of peripheral circuit clocks so that the above conversion time is
achieved.
32 MHz : Source oscillation (4 MHz) with x8 multiplier, divided by 1
16 MHz : Source oscillation with x8 multiplier, divided by 2
• External interrupt : 8 channels
• Bit search module (for REALOS)
Search function to locate the position of the first bit that changes from “1” to “0” in one word, from the MSB
(Most Significant Bit)
• UART (full duplex double buffer type) : 1 channel
Parity enable/disable selectable
Asynchronous clock operation (start-stop synchronization) and synchronous clock operation selectable
Dedicated baud-rate timer (U-Timer) embedded in each channel
External clock can be used as transfer clock
Parity, frame, overrun error detection functions provided
• LIN-UART (full duplex double buffer type) : 3 channels
Synchronous/asynchronous clock operations selectable
Sync-break detection
Dedicated built-in baud-rate generator
• Stepping motor controller (SMC) : 6 channels
8-bit PWM with 4 high-current outputs for each channel
• 8/16-bit PPG timer : 8/4 channels
• 16-bit reload timer : 3 channels
• 16-bit free-run timer : 2 channels (ICU/OCU linkage)
• 16-bit pulse width counter : 1 channel
• Input capture : 4 channels (linked to ch.0 and ch.1 of free-run timer)
ch.0 linked to PWC
• Output compare : 2 channels (linked to ch.0 of free-run timer)
• LCD controller : SEG00 to SEG31/COM0 to COM3 (shared with port)
• 16-bit timebase/watch dog timer
• Sound generator
• Real-time clock
• 32 kHz sub clock (not supported in single clock products)
• C-CAN : 2 channels
• Low power consumption modes : sleep mode, stop mode, watch mode
• Package : LQFP-144 (FPT-144P-M08)
• CMOS technology : 0.35 μm
• Power supply voltage : 5 V (Internal logic : 3.3 V, I/O : 5.0 V (step-down circuit used))
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