MB91220/S データシートの表示（PDF） - Fujitsu
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コンポーネント説明
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MB91220/S Datasheet PDF : 88 Pages
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MB91220/S Series
■ PIN DESCRIPTIONS
Pin No.
129
128
16
17
108
105
106
107
29 to 35
36
21 to 28
144
1 to 7
8 to 15
116
Pin name
X0
X1
X0A
X1A
INITX
MD2
MD1
MD0
P00 to P06
SEG24 to SEG30
D00 to D06
P07
SEG31
ATGX
D07
P10 to P17
SEG16 to SEG23
D08 to D15
P20
SEG0
A00
P21 to P27
SEG1 to SEG7
A01 to A07
P30 to P37
SEG8 to SEG15
A08 to A15
P40
SIN0
INT0
I/O
circuit
type*
Function
A Main clock (oscillator) input.
A Main clock (oscillator) output.
B Sub clock (oscillator) input.
B Sub clock (oscillator) output.
C External reset input
D
Mode pin 2. The setting on this pin determines the basic operation mode.
Connect it to VCC or VSS.
D
Mode pin 1. The setting on this pin determines the basic operation mode.
Connect it to VCC or VSS.
D
Mode pin 0. The setting on this pin determines the basic operation mode.
Connect it to VCC or VSS.
General-purpose I/O port
G SEG output from LCDC
External data bus bit00 to bit06
General-purpose I/O port
SEG output from LCDC
G
External trigger input for A/D converter.
External data bus bit07
General-purpose I/O port
G SEG outputs from LCDC
External data bus bit08 to bit15
General-purpose I/O port
F SEG output from LCDC
External address bus bit00
General-purpose I/O port
F SEG outputs from LCDC
External address bus bit01 to bit07
General-purpose I/O port
F SEG outputs from LCDC
External address bus bit08 to bit15
General-purpose I/O port: Valid when the data input specification is
prohibited on UART0.
UART0 data input. Because this input is used as necessary while
M
UART0 is used for input operation, the port output needs to be disabled
except when it is used intentionally.
External interrupt input. Because those inputs are used as necessary
while the pertinent external interrupt is enabled, the port outputs need to
be disabled except when they are used intentionally.
(Continued)
6
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