MBM29LV001BC-55PFTR データシートの表示（PDF） - Fujitsu

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MBM29LV001BC-55PFTR

FLASH MEMORY CMOS 1M (128K × 8) BIT

Fujitsu 

MBM29LV001TC-55/-70/MBM29LV001BC-55/-70

s ERASE AND PROGRAMMING PERFORMANCE

Parameter

Min.

Limits

Typ.

Max.

Sector Erase Time

—

1

10

Byte Programming Time

—

8

300

Chip Programming Time

—

1.0

3.1

Erase/Program Cycle

100,000

—

—

Unit

Comments

sec

Excludes programming time

prior to erasure

µs

Excludes system-level

overhead

sec

Excludes system-level

overhead

cycles

—

s TSOP(I) PIN CAPACITANCE

Parameter

Symbol

Parameter Description

CIN

COUT

CIN2

Input Capacitance

Output Capacitance

Control Pin Capacitance

Note: Test conditions TA = 25°C, f = 1.0 MHz

Test Setup

VIN = 0

VOUT = 0

VIN = 0

s PLCC PIN CAPACITANCE

Parameter

Symbol

Parameter Description

CIN

Input Capacitance

COUT

Output Capacitance

CIN2

Control Pin Capacitance

Note: Test conditions TA = 25°C, f = 1.0 MHz

Test Setup

VIN = 0

VOUT = 0

VIN = 0

Typ.

Max.

Unit

7

8

pF

8

10

pF

8

10

pF

Typ.

Max.

Unit

7

8

pF

8

10

pF

8

10

pF

46

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