MC100E446 データシートの表示（PDF） - ON Semiconductor
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MC100E446 Datasheet PDF : 12 Pages
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MC10E446, MC100E446
Applications Information
The MC10E/100E446 is an integrated 4:1 parallel to serial
converter. The chip is designed to work with the E445 device
to provide both transmission and receiving of a high speed
serial data path. The E446 can convert 4 bits of data into a
1.3 Gb/s NRZ data stream. The device features a SYNC
input which allows the user to reset the internal clock
circuitry and restart the conversion sequence
(see timing diagram A).
The E446 features a differential serial input and internal
divide by 8 circuitry to facilitate the cascading of two
devices to build a 8:1 multiplexer. Figure 1 illustrates the
architecture for a 8:1 multiplexer using two E446’s; the
timing diagram for this configuration can be found on the
following page. Notice the serial outputs (SOUT) of the
higher order converter feed the serial inputs of the the lower
order device. This feed through of the serial inputs bounds
the upper end of the frequency of operation. The clock to
serial output propagation delay plus the setup time of the
serial input pins must fit into a single clock period for the
cascade architecture to function properly. Using the worst
case values for these two parameters from the data sheet,
TPD CLK to SOUT = 1480 ps and tS for SIN = −200 ps,
yields a minimum period of 1280 ps or a clock frequency of
780 MHz.
The clock frequency is somewhat lower than that of a
single converter, to increase this frequency some games can
be played with the clock input of the higher order E446. By
delaying the clock feeding E446A relative to the clock of
E446B the frequency of operation can be increased.
CLK
CLK
E446B
SOUT
SOUT
Q3 Q2 Q1 Q0
E446A
SIN SOUT
SIN SOUT
Q3 Q2 Q1 Q0
Serial
Data
MSB
Q7 Q6 Q5 Q4
LSB
Q3 Q2 Q1 Q0
Parallel Data
CLOCK
Tpd CLK
to SOUT
1000ps
1000ps
1600ps
600ps
Figure 5. Cascaded 8:1 Converter Architecture
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