MC100ELT20DTG(2015) データシートの表示（PDF） - ON Semiconductor

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MC100ELT20DTG
(Rev.:2015)

5V TTL to Differential PECL Translator

ON Semiconductor 

MC10ELT20, MC100ELT20

ORDERING INFORMATION

Device

MC10ELT20DG

Package

SO−8

(Pb−Free)

Shipping†

98 Units / Rail

MC10ELT20DR2G

SO−8

(Pb−Free)

2500 / Tape & Reel

MC10ELT20DTG

TSSOP−8

(Pb−Free)

100 Units / Rail

MC10ELT20DTR2G

TSSOP−8

(Pb−Free)

2500 / Tape & Reel

MC100ELT20DG

SO−8

(Pb−Free)

98 Units / Rail

MC100ELT20DR2G

SO−8

(Pb−Free)

2500 / Tape & Reel

MC100ELT20DTG

TSSOP−8

(Pb−Free)

100 Units / Rail

MC100ELT20DTR2G

TSSOP−8

(Pb−Free)

2500 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

Resource Reference of Application Notes

AN1405/D − ECL Clock Distribution Techniques

AN1406/D − Designing with PECL (ECL at +5.0 V)

AN1503/D − ECLinPSt I/O SPiCE Modeling Kit

AN1504/D − Metastability and the ECLinPS Family

AN1568/D − Interfacing Between LVDS and ECL

AN1672/D − The ECL Translator Guide

AND8001/D − Odd Number Counters Design

AND8002/D − Marking and Date Codes

AND8020/D − Termination of ECL Logic Devices

AND8066/D − Interfacing with ECLinPS

AND8090/D − AC Characteristics of ECL Devices

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