MC141585 データシートの表示（PDF） - Motorola => Freescale
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MC141585 Datasheet PDF : 27 Pages
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Bit 6 FSS - Font Size Selection
1: 10x18 font size selected
0: 12x18 font size selected
Bit 5 INV - Inverse the test pattern outputs from white to
black and black to white vice versa.
Bit 4 FSW - Full Screen White Enable, setting “1” to this bit
all the screen shown white. The vertical and horizontal hatch
lines enabled by Bit 3 & Bit 4 in this register will be overrid-
den. Full Screen White can be inversed by setting INV bit to
“1”.
Bit 3 VE - Vertical Line Enable, while writing “1” to this bit,
the vertical hatch lines will be shown by the settings of V3,
V2, V1, V0 in Hatch Line Space Register.
Bit 2 HE - Horizontal Line Enable, while writing “1” to this
bit, the horizontal hatch lines will be shown by the settings of
H3, H2, H1, H0 in Hatch Line Space Register.
Note:Compared with OSD outputs, FSW and the Hatch lines
generation are at the lowest priority. In addition,when these
test pattern are activated, the video signal from PC will be
disable.
Bit 1 DE - PIXin Divider enable.
Bit 0 DIV - "0" divided by 2; "1" divided by 3.
Hatch Line Space Register(Row16, Coln1)
7
6
5
4
3
2
1
0
H3 H2 H1 H0 V3 V2 V1 V0
Bit 7-4 H3, H2, H1, H0 define line space of horizontal hatch
lines.Zero is not allowed. Default value is 1.
t 3-0 V3, V2, V1, V0 define line space of vertical hatch
lines. Zero is not allowed. Default value is 1.
The space is defined by the formula below:
Space of Horizontal Hatch lines = (H3, H2, H1, H0) X 3 + 3
Space of Vertical Hatch Lines = (V3, V2, V1, V0) X 4 + 4
The hatch lines are white when the INV bit is not set. The
whole hatch pattern will be inversed by setting INV bit to “1”.
Windows Shadow Color Register 1(Row16,Coln2)
7
6
5
4
3
2
10
X
R2 G2 B2 X
R1 G1 B1
This register defines the shadow colors of window 1 and win-
dow 2.
Bit 7 X, Don’t Care.
Bit 6-4 R2, G2, B2 define the shadow color for window 2.
Bit 3 X, Don’t Care.
Bit 2-0 R1, G1, B1 define the shadow color for window 1.
Windows Shadow Color Register 1(Row16,Coln3)
7
6
5
4
3
X
R4 G4 B4 X
2
1
0
R3 G3 B3
This register defines the shadow colors of window 3 and
window 4.
Bit 7 X, Don’t Care.
Bit 6-4 R4, G4, B4 define the shadow color for window 4.
Bit 3 X, Don’t Care.
Bit 2-0 R3, G3, B3 define the shadow color for window 3.
Page Selection Registers(Row16,Coln4)
7
6
5
4
3
2
1
0
X
C2 C1 C0
X
B2 B1 B0
Bank A is fixed 128-ROM(address 00-7F). The register
define the address pointers of Bank B(address 80-BF) and
Bank C(address C0-FF) by A0-A2 and B0-B2.
Bit 7 X, Don’t Care.
Bit 6-4 C2, C1, C0 define the page selected to Bank C.
Bit 3 X Don’t Care.
Bit 2-0 B2, B1, B0 define the page selected to Bank B.
The default page in bank B is page 1 and page 2 for bank
C.
The definition of page number is listed in Table 5.
Table 4. Page ROM selection
Page 1
Page 2
Page 3
Page 4
Page 5
Page 6
Reserve
Reserve
BANK B
BANK C
B2 B1 B0 C2 C1 C0
0 0 0000
0 0 1001
0 1 0010
0 1 1011
1 0 0100
1 0 1101
1 1 0110
1 1 1111
MC141585
14
MOTOROLA
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