MC141585 データシートの表示（PDF） - Motorola => Freescale
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MC141585 Datasheet PDF : 27 Pages
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LMOSD2-16 circuitry of MC141585, so that the received in-
formation can then be displayed.
SDA
CHIP ADDRESS
ACK
DATA BYTES
ACK
SCL
1 2–7 8 9
START CONDITION
STOP CONDITION
Figure 4. M_BUS Format
DATA TRANSMISSION FORMATS
After the proper identification by the receiving device, data
train of arbitrary length is transmitted from the Master. As
mentioned above, two register blocks, display registers,
attribute/control registers, need to be programmed before
the proper operation. Basically, these three areas use the
similar transmission protocol. Only two bits of the row/seg-
ment byte are used to distinguish the programming blocks.
There are three transmission formats, from (a) to (c) as
stated below. The data train in each sequence consists of
row/seg address (R), column/line address (C), and data
informations (I). In format (a), each display information data
have to be preceded with the corresponding row/seg
address and column/line address. This format is particular
suitable for updating small amount of data between different
row. However, if the current information byte has the same
row/seg address as the one before, format (b) is recom-
mended. For a full screen pattern change which requires
massive information update or during power up situation,
most of the row/seg and column/line address on either (a) or
(b) format will appear to be redundant. A more efficient data
transmission format (c) should be applied. It sends the RAM
starting row/seg and column/line addresses once only, and
then treat all subsequent data as data information. The row/
seg and column/line addresses will be automatically incre-
mented internally for each information data from the starting
location.
Based on the different programming areas, the detail
transmission protocol is described below respectively.
(I) Display Register Programming
The data transmission formats are:
(a) R - > C- > I -> R - > C - > I - > . . . . . . . . .
(b) R - > C - > I - > C - > I - > C - > I. . . . . . .
(c) R - > C - > I - > I - > I - > . . - > Idummy - > Idummy - > I - > I. .
NOTE: - R means row byte.
- C means column byte.
- I means data byte.
- In format (c), two dummy data bytes(col 30,
col 31)have to be inserted after the last data
byte(col 29) at the end of each row, before
the first data byte of the next row.
To differentiate the display row address from attribute
area when transferring data, the most significant three bits
are set to ‘100’ to represent display row address, while ‘00X’
for column address used in format (a) or (b) and ‘01X’ for col-
umn address used in format (c). There is some limitation on
using mix-formats during a single transmission. It is permis-
sible to change the format from (a) to (b), or from (a) to (c), or
from (b) to (a), but not from (c) back to (a) or (b).
row addr col addr
info
Figure 5. Data Packet for Display Data
0
0
COLUMN
27 28 29
DISPLAY REGISTERS
14
ADDRESS
BIT
7 6543
ROW
1 00 XD
COLUMN 0 0 X D D
COLUMN 0 1 X D D
X: don’t care
FORMAT
21 0
D D D a, b, c
D D D a, b
DD D c
D: valid data
Figure 6. Address Bit Patterns for Display Data
(II) Attribute/Control Register Programming
The data transmission formats are similar with that in dis-
play data programming:
(a) R - > C- > I -> R - > C - > I - > . . . . . . . . .
(b) R - > C - > I - > C - > I - > C - > I. . . . . . .
(c) R - > C - > I - > I - > I - > . .- > Irow attr. - > Idummy - > I - > I. .
NOTE: - R means row byte.
MOTOROLA
MC141585
7
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