MC145446A データシートの表示（PDF） - Motorola => Freescale

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MC145446A

Single-Chip 300-Baud Modem with DTMF Transceiver

Motorola => Freescale 

PIN DESCRIPTIONS

VCC

Positive Power Supply (Pins 1, 13, 21)

The digital supply pins, which are connected to the positive

power supply (5 V).

GND

Ground Pins (Pins 2, 12)

The ground pins are connected to the system ground.

Vref

Reference Analog Ground (Pin 3)

This pin provides the analog ground voltage, which is inter-

nally regulated to VCC/2. It should be decoupled to the GND

with 0.1 µF and 100 µF capacitors.

X1

Crystal Oscillator Output (Pin 9)

A 3.579545 MHz ± 0.1% crystal oscillator is tied to this pin

with the other end connected to X2.

X2

Crystal Oscillator Input (Pin 10)

A 3.579545 MHz ± 0.1% crystal oscillator is tied to this pin

with the other end connected to X1. X2 may also be driven

directly from an appropriate external source.

SCK

Serial Clock Input (Pin 19)

This pin is the clock input for the 16–bit control resistor and

the 4–bit status resistor. The serial data is captured into the

control register, or is shifted out of the status register on the

rising edge of SCK.

DATA I/O

Serial Data Input/Output (Pin 18)

This pin is the 16–bit control register input, which deter-

mines the operation mode, DTMF tone, transmit attenuation

(receiver gain), carrier detect time, channel, and transmit

squelch. This pin is also the four–bit status register output

which indicates the received DTMF tone (hexadecimal

codes).

E

Enable Input (Pin 20)

When the R/W pin is at logic low, high level on the E pin

makes the 16–bit control register data transparent to the

mode control logic so that the device operation is changed.

While this pin is at logic low, the control register and the

mode control logic are isolated. The E pin must NOT be held

high while the control register data is being changed.

When the R/W pin is at logic high, the rising edge of E

transfers the four–bit DTMF data from the DTMF decoder to

the status register. Then the first bit (LSB = D0) is presented

at the Data I/O pin.

R/W

Read/Write Data Switch (Pin 14)

This pin is used for controlling the I/O direction of the Data

I/O pin.

MC145446A

8

TxD

Transmit Data Input (Pin 17)

This pin is the transmit data input. When the device is in

FSK mode, the mark frequency is generated when this pin is

at the logic high level. The space frequency is generated

when the pin is at a logic low.

RxD

Receive Data Output (Pin 16)

This pin is the receive data output. When the device is in

the FSK mode, a high logic level of this pin indicates that the

mark carrier frequency has been received, and a low logic

level indicates the space carrier frequency has been re-

ceived.

SD/CD/DV

Carrier/Call Progress Tone Detect/DTMF Data Valid

Detect (Pin 15)

This pin works as a carrier detector in the FSK mode,

whereas it works as the call progress tone detector in the

CPTD mode and as the receive DTMF detector in the DTMF

Rx mode. The output goes to a logic low level when the input

signal reaches the minimum threshold of the detect level that

is adjusted by the CDA voltage. When this pin is logic high,

the receive data output (RxD) is clamped high to avoid the

error that may occur with the loop noise.

In DTMF Rx mode, the logic low on this pin indicates that

the valid DTMF frequencies are detected. The received tone

is decoded to four–bit data, then stored in the DTMF decoder

by the falling edge of DV.

TxA1

Non–Inverting Transmit Analog Carrier Output (Pin 24)

This pin is the line driver non–inverting output. A 7 dBm

(typ) differential output voltage can be obtained by connect-

ing a 1.2 kΩ load resistor between Tx1 and Tx2. Attention

must be paid so as not to exceed this level when an external

input is added to the DSI pin. A telephone line (600 Ω) is driv-

en through an external 600 Ω resistor (see the Application

Circuit). In this case, the output level becomes about a half of

the differential output.

TxA2

Inverting Transmit Analog Carrier Output (Pin 23)

This pin is the line driver inverting output. The signal is

equal in magnitude, but 180° out of phase with the TxA1

(refer to TxA1).

RxA

Receive Signal Input (Pin 25)

This pin is the carrier signal input, and is enabled when the

device is in FSK or CPTD mode.

RxGC

Receive Gain Adjust (Pin 26)

This pin is used to adjust the receive buffer gain. To adjust

the gain, a resistor may be added between this pin and the

RxBO pin (refer to the Block Diagram). This pin may be held

open when the gain adjustment is not needed.

RxBO

Receive Buffer Output (Pin 27)

This pin is the receive buffer output.

MOTOROLA

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