MC14598B データシートの表示（PDF） - ON Semiconductor

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MC14598B

8−Bit Bus−Compatible Latches

ON Semiconductor 

RESET 2

DATA 3

STROBE 6

ENABLE 4

A0 7

A1 8

A2 10

(M.S.B)

MC14598B

MC14598B FUNCTION DIAGRAM

VDD

TO OTHER

LATCHES

TO OTHER

LATCHES

ADDRESS

DECODER

ZERO

SELECT

1 D0

EACH LATCH

VSS

ADDITIONAL 7 LATCHES

17 D1

16 D2

15 D3

14 D4

13 D5

12 D6

11 D7

MC14598B TIMING DIAGRAM

50%

90%

10%

tTHL

tPLH

D7 1

50%

tPLH

tPHL

RESET

tW

A0, A1, A2

DATA

STROBE

ENABLE

*

tsu

90%

10%

20 ns

th

50%

90%

10%

20 ns

tW

*1.4 V with VDD = 5.0 V

NOTES:

1. High−impedance output state (another device controls bus).

2. Output Load as for MC14597B.

90%

10%

tTLH

20 ns

50%

90%

10%

tsu th

tW

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