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MC56F8345MFG60 データシートの表示(PDF) - Motorola => Freescale

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MC56F8345MFG60
Motorola
Motorola => Freescale Motorola
MC56F8345MFG60 Datasheet PDF : 148 Pages
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Freescale Semiconductor, Inc.
5
JTAG / EOnCE
CHIP
TAP
Controller
pdb_m[15:0]
pab[20:0]
cdbw[31:0]
56800E
Boot
Flash
Program
Flash
Program
RAM
EMI*
11
Address
4
Data
6
Control
TAP
Linking
Module
External JTAG
Port
xab1[23:0]
xab2[23:0]
cdbr_m[31:0]
xdb2_m[15:0]
Data RAM
Data Flash
IPBus
Bridge
To Flash
Control Logic
* EMI not functional in this
package; since only part of the
address/data bus is bonded out,
use as GPIO pins
IPBus
Figure 1-1 System Bus Interfaces
Flash
Memory
Module
Note:
Note:
Flash memories are encapsulated within the Flash Memory (FM) Module. Flash control is
accomplished by the I/O to the FM over the peripheral bus, while reads and writes are
completed between the core and the Flash memories.
The primary data RAM port is 32 bits wide. Other data ports are 16 bits.
8
56F8345 Technical Data
For More Information On This Product,
Go to: www.freescale.com
Preliminary

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