MC56F8037E データシートの表示（PDF） - Freescale Semiconductor

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MC56F8037E

16-bit Digital Signal Controllers

Freescale Semiconductor 

56F8037 Description

— Fully compliant with CAN protocol - Version 2.0 A/B

— Supports standard and extended data frames

— Supports data rate up to 1Mbps

— Five receive buffers and three transmit buffers

• Three 16-bit Programmable Interval Timers (PITs)

• Two analog Comparators (CMPs)

— Selectable input source includes external pins, DACs

— Programmable output polarity

— Output can drive Timer input, PWM fault input, PWM source, external pin output and trigger ADCs

— Output falling and rising edge detection able to generate interrupts

• Computer Operating Properly (COP)/Watchdog timer capable of selecting different clock sources

• Up to 53 General-Purpose I/O (GPIO) pins with 5V tolerance

• Integrated Power-On Reset and Low-Voltage Interrupt Module

• Phase Lock Loop (PLL) to provide high-speed clock to the core and peripherals

• Clock sources:

— On-chip relaxation oscillator

— External clock: crystal oscillator, ceramic resonator and external clock source

• JTAG/EOnCE debug programming interface for real-time debugging

1.1.4 Energy Information

• Fabricated in high-density CMOS with 5V tolerance

• On-chip regulators for digital and analog circuitry to lower cost and reduce noise

• Wait and Stop modes available

• ADC smart power management

• Each peripheral can be individually disabled to save power

1.2 56F8037 Description

The 56F8037 is a member of the 56800E core-based family of Digital Signal Controllers (DSCs). It

combines, on a single chip, the processing power of a DSP and the functionality of a microcontroller with

a flexible set of peripherals to create an extremely cost-effective solution. Because of its low cost,

configuration flexibility, and compact program code, the 56F8037 is well-suited for many applications.

The 56F8037 includes many peripherals that are especially useful for industrial control, motion control,

home appliances, general purpose inverters, smart sensors, fire and security systems, switched-mode

power supply, power management, and medical monitoring applications.

The 56800E core is based on a dual Harvard-style architecture consisting of three execution units

operating in parallel, allowing as many as six operations per instruction cycle. The MCU-style

programming model and optimized instruction set allow straightforward generation of efficient, compact

DSP and control code. The instruction set is also highly efficient for C compilers to enable rapid

development of optimized control applications.

The 56F8037 supports program execution from internal memories. Two data operands can be accessed

56F8037 Data Sheet, Rev. 3

Freescale Semiconductor

7

Preliminary

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