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MC74HC157 データシートの表示(PDF) - ON Semiconductor

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MC74HC157 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
MC74HC157A
Quad 2-Input Data
Selectors / Multiplexers
High–Performance Silicon–Gate CMOS
The MC74HC157A is identical in pinout to the LS157. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
This device routes 2 nibbles (A or B) to a single port (Y) as
determined by the Select input. The data is presented at the outputs in
noninverted form. A high level on the Output Enable input sets all four
Y outputs to a low level.
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 µA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 82 FETs or 20.5 Equivalent Gates
LOGIC DIAGRAM
NIBBLE
A INPUTS
NIBBLE
B INPUTS
A0 2
A1 5
A2 11
A3 14
B0 3
B1 6
B2 10
B3 13
4 Y0
7 Y1
9 Y2
12 Y3
DATA
OUTPUTS
PIN 16 = VCC
PIN 8 = GND
1
SELECT
OUTPUT 15
ENABLE
FUNCTION TABLE
Inputs
Output
Enable Select
H
X
L
L
L
H
Outputs
Y0 – Y3
L
A0 – A3
B0 – B3
X = don’t care
A0 – A3, B0 – B3 = the levels of the
respective Data–Word Inputs.
http://onsemi.com
16
1
16
1
PDIP–16
N SUFFIX
CASE 648
SO–16
D SUFFIX
CASE 751B
MARKING
DIAGRAMS
16
MC74HC157AN
AWLYYWW
1
16
HC157A
AWLYWW
1
16
16
1
TSSOP–16
DT SUFFIX
CASE 948F
HC
157A
ALYW
1
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
PIN ASSIGNMENT
SELECT 1
A0 2
B0 3
Y0 4
A1 5
B1 6
Y1 7
GND 8
16 VCC
15
OUTPUT
ENABLE
14 A3
13 B3
12 Y3
11 A2
10 B2
9 Y2
ORDERING INFORMATION
Device
Package Shipping
MC74HC157AN
PDIP–16 2000 / Box
MC74HC157AD
SOIC–16 48 / Rail
MC74HC157ADR2
SOIC–16 2500 / Reel
MC74HC157ADT
TSSOP–16 96 / Rail
MC74HC157ADTR2 TSSOP–16 2500 / Reel
© Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 8
Publication Order Number:
MC74HC157A/D

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