MC74HC139ADTR2G(2012) データシートの表示（PDF） - ON Semiconductor

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MC74HC139ADTR2G
(Rev.:2012)

Dual 1−of−4 Decoder/Demultiplexer

ON Semiconductor 

MC74HC139A

PIN DESCRIPTIONS

ADDRESS INPUTS

A0a, A1a, A0b, A1b (Pins 2, 3, 14, 13)

Address inputs. These inputs, when the respective 1−of−4

decoder is enabled, determine which of its four active−low

outputs is selected.

CONTROL INPUTS

Selecta, Selectb (Pins 1, 15)

Active−low select inputs. For a low level on this input, the

outputs for that particular decoder follow the Address

inputs. A high level on this input forces all outputs to a high

level.

OUTPUTS

Y0a − Y3a, Y0b − Y3b (Pins 4 − 7, 12, 11, 10, 9)

Active−low outputs. These outputs assume a low level

when addressed and the appropriate Select input is active.

These outputs remain high when not addressed or the

appropriate Select input is inactive.

SELECT

Y0

Y1

A0

Y2

Y3

A1

Figure 6. Expanded Logic Diagram

(1/2 of Device)

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