MC74HC73 データシートの表示（PDF） - Motorola => Freescale

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MC74HC73

Dual J-K Flip-Flop with Reset

Motorola => Freescale 

MC74HC73

SWITCHING WAVEFORMS

tf

tr

90%

VCC

CLOCK

50%

10%

GND

tw

1/fmax

tPLH tPHL

90%

Q or Q 50%

10%

tTLH

tTHL

Figure 1.

tw

VCC

RESET

50%

GND

tPHL

Q

50%

tPLH

Q

50%

trec

CLOCK

VCC

50%

GND

Figure 2.

J or K

CLOCK

RESET 2, 6

J 14, 7

K 3, 10

1, 5

CLOCK

VALID

tsu

th

50%

Figure 3.

VCC

TEST POINT

GND

OUTPUT

VCC

DEVICE

UNDER

TEST

CL*

GND

* Includes all probe and jig capacitance

Figure 4.

EXPANDED LOGIC DIAGRAM

CL

CL

CL

CL

CL

CL

CL

CL

CL

CL

12, 9 Q

CL

CL

13, 8 Q

CL

CL

MOTOROLA

4

High–Speed CMOS Logic Data

DL129 — Rev 6

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