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MCM63P819KZP150R データシートの表示(PDF) - Motorola => Freescale

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MCM63P819KZP150R Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
Freescale Semiconductor, Inc.
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VDD = 3.3 V +10%, –5%, TA = 0° to 70°C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS AND DC CHARACTERISTICS (Voltages Referenced to VSS = 0 V)
Parameter
Symbol
Min
Typ
Max
Unit
2.5 V I/O SUPPLY
Supply Voltage
VDD
3.135
3.3
3.465
V
I/O Supply Voltage
Input Low Voltage
Input High Voltage
VDDQ
VIL
VIH
2.375
–0.3*
1.7
2.5
2.9
V
0.7
V
VDD + 0.3**
V
Input High Voltage I/O Pins
Output Low Voltage (IOL = 2 mA)
VIH2
1.7
VDDQ + 0.3**
V
VOL
0.7
V
Output High Voltage (IOH = –2 mA)
3.3 V I/O SUPPLY
VOH
1.7
V
Supply Voltage
VDD
3.135
3.3
3.465
V
I/O Supply Voltage
Input Low Voltage
Input High Voltage
VDDQ
VIL
VIH
3.135
–0.5*
2
3.3
VDD
V
0.8
V
VDD + 0.5***
V
Input High Voltage I/O Pins
VIH2
2
Output Low Voltage (IOL = 8 mA)
VOL
Output High Voltage (IOH = –4 mA)
VOH
2.4
* Undershoot: VIL > –1.0 V for t < 20% tKHKH.
** Overshoot: VIH/VIH2 < VDD/VDDQ + 1.0 V (not to exceed 3.6 V) for t < 20% tKHKH.
*** Overshoot: VIH/VIH2 < VDD/VDDQ + 1.0 V (not to exceed 4.6 V) for t < 20% tKHKH.
VDDQ + 0.5***
V
0.4
V
V
SUPPLY CURRENTS
Parameter
Symbol
Min
Typ
Max
Unit Notes
Input Leakage Current (0 V Vin VDD)
Ilkg(I)
Output Leakage Current (0 V Vin VDDQ)
Ilkg(O)
AC Supply Current (Device Selected, MCM63P737K / 819K–166 IDDA
All Outputs Open, Freq = Max)
MCM63P737K / 819K–150
Includes VDD Only
MCM63P737K / 819K–133
CMOS Standby Supply Current (Device Deselected, Freq = 0,
ISB2
VDD = Max, All Inputs Static at CMOS Levels)
±1
µA
1
±1
µA
500/430 mA 2, 3, 4
470/400
450/380
30
mA
5, 6
Sleep Mode Supply Current (Device Deselected, Freq = Max,
VDD = Max, All Other Inputs Static at CMOS Levels,
ZZ VDD – 0.2 V)
IZZ
TTL Standby Supply Current (Device Deselected, Freq = 0,
VDD = Max, All Inputs Static at TTL Levels)
ISB3
Clock Running (Device Deselected, MCM63P737K / 819K–166 ISB4
Freq = Max, VDD = Max, All Inputs MCM63P737K / 819K–150
Toggling at CMOS Levels)
MCM63P737K / 819K–133
15
mA 1, 5, 6
35
mA
5, 7
185/170
mA
5, 6
175/160
160/145
Static Clock Running
(Device Deselected,
MCM63P737K / 819K–166 ISB5
MCM63P737K / 819K–150
Freq = Max,VDD = Max, All Inputs
Static at TTL Levels)
MCM63P737K / 819K–133
75/65
mA
5, 7
70/60
65/55
NOTES:
1. LBO and ZZ pins have an internal pull–up and pull–down, respectively; and will exhibit leakage currents of ±5 µA.
2. Reference AC Operating Conditions and Characteristics for input and timing.
3. All addresses transition simultaneously low (LSB) then high (MSB).
4. Data states are all zero.
5. Device is deselected as defined by the Truth Table.
6. CMOS levels for I/Os are VIT VSS + 0.2 V or VDDQ – 0.2 V. CMOS levels for other inputs are Vin VSS + 0.2 V or VDD – 0.2 V.
7. TTL levels for I/Os are VIT VIL or VIH2. TTL levels for other inputs are Vin VIL or VIH.
MOTOROLA FAST SRAM
For More Information On This Product, MCM63P737KMCM63P819K
Go to: www.freescale.com
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