MCP121-240I データシートの表示（PDF） - Microchip Technology

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MCP121-240I

Micropower Voltage Supervisors

Microchip Technology 

MCP102/103/121/131

4.0 APPLICATION INFORMATION

4.1 RST Operation

For many of today’s microcontroller applications, care

must be taken to prevent low-power conditions that can

cause many different system problems. The most

common causes are brown-out conditions, where the

system supply drops below the operating level momen-

tarily. The second most common cause is when a

slowly decaying power supply causes the

microcontroller to begin executing instructions without

sufficient voltage to sustain volitile memory (RAM), thus

producing indeterminate results. Figure 4-1 shows a

typical application circuit.

The MCP102/103/121/131 are voltage supervisor

devices designed to keep a microcontroller in reset

until the system voltage has reached and stabilized at

the proper level for reliable system operation. These

devices also operate as protection from brown-out

conditions.

VDD

0.1

µF

VDD

MCP1XX

RST

VSS

VDD

RPU

PICmicro®

Microcontroller

MCLR

(Reset input)

(Active-low)

VSS

Note 1: Resistor RPU may be required with the

MCP121 due to the open-drain output.

Resistor RPU may not be required with

the MCP131 due to the internal pull-up

resistor. The MCP102 and MCP103 do

not require the external pull-up resistor.

FIGURE 4-1:

Typical Application Circuit.

The RST output pin operation determines how the

device can be used and indicates when the system

should be forced into reset. To accomplish this, an

internal voltage reference is used to set the voltage trip

point (VTRIP). Additionally, there is a hysteresis on this

trip point.

When the falling edge of VDD crosses this voltage

threshold, the reset power-down timer (TRPD) starts.

When this delay timer times out, the RST pin is forced

low.

When the rising-edge of VDD crosses this voltage

threshold, the reset power-up timer (TRPU) starts.

When this delay timer times out, the RST pin is forced

high, TRPU is active and there is additional system

current.

The actual voltage trip point (VTRIPAC) will be between

the minimum trip point (VTRIPMIN) and the maximum

trip point (VTRIPMAX). The hysteresis on this trip point

and the delay timer (TRPU) are to remove any “jitter”

that would occur on the RST pin when the device VDD

is at the trip point.

Figure 4-2 shows the waveform of the RST pin as deter-

mined by the VDD voltage, while Table 4-1 shows the

state of the RST pin. The VTRIP specification is for falling

VDD voltages. When the VDD voltage is rising, the RST

will not be driven high until VDD is at VTRIP + VHYS. Once

VDD has crossed the voltage trip point, there is also a

minimal delay time (TRPD) before the RST pin is driven

low.

TABLE 4-1: RST PIN STATES

State of RST Pin when:

Device VDD < VTRIP VDD >

Ouput Driver

VTRIP + VHYS

MCP102

L

H

Push-pull

MCP103

L

MCP121

L

MCP131

L

H

H (1)

H (2)

Push-pull

Open-drain (1)

Open-drain (2)

Note 1: Requires External Pull-up resistor

2: Has Internal Pull-up resistor

VDD

VTRIPMAX

VTRIPMIN

VTRIPAC + VHYSAC

VTRIPAC

VTRIPAC

1V

RST

tRPD

< 1V is outside the

device specifications

tRPU

tRPD

tRPU

FIGURE 4-2:

RST Operation as Determined by the VTRIP and VHYS.

DS21906B-page 12

© 2005 Microchip Technology Inc.

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