MCP121-240I データシートの表示（PDF） - Microchip Technology

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MCP121-240I

Micropower Voltage Supervisors

Microchip Technology 

4.2 Negative Going VDD Transients

The minimum pulse width (time) required to cause a

reset may be an important criteria in the implementa-

tion of a Power-on Reset (POR) circuit. This time is

referred to as transient duration, defined as the amount

of time needed for these supervisory devices to

respond to a drop in VDD. The transient duration time is

dependant on the magnitude of VTRIP – VDD. Generally

speaking, the transient duration decreases with

increases in VTRIP – VDD.

Figure 4-3 shows a typical transient duration vs. reset

comparator overdrive, for which the

MCP102/103/121/131 will not generate a reset pulse. It

shows that the farther below the trip point the transient

pulse goes, the duration of the pulse required to cause

a reset gets shorter. Figure 2-32 shows the transient

response characteristics for the MCP102/103/121/131.

A 0.1 µF bypass capacitor, mounted as close as

possible to the VDD pin, provides additional transient

immunity (refer to Figure 4-1).

5V

VTRIP(MAX)

VTRIP(MIN)

VTRIP(MIN) - VDD

tTRANS

0V

Time (µs)

FIGURE 4-3:

Example of Typical

Transient Duration Waveform.

MCP102/103/121/131

4.3 Reset Power-up Timer (tRPU)

Figure 4-4 illustrates the device current states. While

the system is powering down, the device has a low

current. This current is dependent on the device VDD

and trip point. When the device VDD rises through the

voltage trip point (VTRIP), an internal timer starts. This

timer consumes additional current until the RST pin is

driven (or released) high. This time is known as the

Reset Power-up Time (tRPU). Figure 4-4 shows when

tRPU is active (device consuming additional current).

VDD

VTRIP

RST

tRPU

Reset Power-up

Timer Inactive

Reset

Power-up

Timer

Inactive

See Figures 2-1,

2-2 and 2-3

See Figures 2-1,

2-2 and 2-3

See Figures 2-4,

2-5 and 2-6

FIGURE 4-4:

Waveform.

Reset Power-up Timer

4.3.1 EFFECT OF TEMPERATURE ON

RESET POWER-UP TIMER (TRPU)

The Reset Power-up timer time-out period (tRPU)

determines how long the device remains in the reset

condition. This is affected by both VDD and temperature.

Typical responses for different VDD values and

temperatures are shown in Figures 2-26, 2-27 and 2-28.

© 2005 Microchip Technology Inc.

DS21906B-page 13

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