MH8V7245BWZTJ-5 データシートの表示（PDF） - MITSUBISHI ELECTRIC
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MH8V7245BWZTJ-5
MITSUBISHI ELECTRIC
MH8V7245BWZTJ-5 Datasheet PDF : 24 Pages
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Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH8V7245BWZTJ -5, -6
HYPER PAGE MODE 603979776 - BIT ( 8388608 - WORD BY 72 - BIT ) DYNAMIC RAM
Hyper Page Mode Cycle (Read, Early Write, Read -Write, Read-Modify-Write Cycle,
Read Write Mix Cycle,Hi-Z control by /OE or /W) (Note 25)
Limits
Symbol
Parameter
-5
Min
Max
-6
Min
Max
tHPC Hyper page mode read/write cycle time
20
25
tHPRWC Hyper page mode read write/read modify write cycle time
55
66
tDOH Output hold time from /CAS low
5
5
tRAS /RAS low pulse width for read write cycle (Note26) 65
100000
77
100000
tCP
/CAS high pulse width
(Note27)
8
13
10
16
tCPRH /RAS hold time after /CAS precharge
28
33
tCPWD Delay time, /CAS precharge to W low
(Note24)
43
50
Unit
ns
ns
ns
ns
ns
ns
ns
tCHOL Hold time to maintain the data Hi-Z until /CAS access
7
tOEPE /OE Pulse width (Hi-Z control)
7
tWPE /W Pulse width (Hi-Z control)
7
7
ns
7
ns
7
ns
tHCWD Delay time, /CAS low to /W low after read
28
tHAWD Delay time, Address to /W low after read
40
tHPWD Delay time, /CAS precharge to /W low after read
43
32
ns
47
ns
50
ns
tHCOD Delay time, /CAS low to /OE high after read
13
tHAOD Delay time, Address to /OE high after read
25
tHPOD Delay time, /CAS precharge to /OE high after read
28
15
ns
30
ns
33
ns
Note 25: All previously specified timing requirements and switching characteristics are applicable to their respective Hyper page mode cycle.
26: tRAS(min) is specified as two cycles of /CAS input are performed.
27: tCP(max) is specified as a reference point only. If tCP ≥ tCP(max),access time is controlled exclusively by tCAC.
/CAS before /RAS Refresh Cycle (Note 28)
Symbol
Parameter
tCSR
tCHR
tRSR
tRHR
/CAS setup time before /RAS low
/CAS hold time after /RAS low
Read setup time before /RAS low
Read hold time after /RAS low
Limits
-5
-6
Min
Max
Min
Max
5
5
10
10
10
10
10
10
Note 28: Eight or more /CAS before /RAS cycles instead of eight /RAS cycles are necessary for proper operation of /CAS before /RAS refresh
mode.
Unit
ns
ns
ns
ns
MIT-DS-0287-0.0
MITSUBISHI
ELECTRIC
( 9 / 24 )
9/Nov./1998
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