MIC58P42 データシートの表示（PDF） - Micrel
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MIC58P42 Datasheet PDF : 5 Pages
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MIC58P42
PLCC Pin Configuration
NC 4
VSS 5
VDD 6
SERIAL DATA OUT 7
NC 8
32
1 20 19
18 OUT 3
17 OUT 4
MIC58P42BV 16 OUT 5
15 OUT 6
14 OUT 7
9 10 11 12 13
Micrel
Absolute Maximum Ratings (Note 1, 2)
at 25°C Free-Air Temperature and VSS = 0V
Output Voltage
Output Voltage, VCE(SUS) (Note 1)
Logic Supply Voltage Range, VDD
VDD with Reference to VEE
Emitter Supply Voltage (Substrate), VEE
Input Voltage Range, VIN
Package Power Dissipation, PD
MIC58P42BN
Derate above TA = +25°C
MIC58P42BV
Derate above TA = +25°C
MIC58P42BWM
Derate above TA = +25°C
Operating Temperature Range, TA
Storage Temperature Range, TS
80V
50V
4.5V to 15V
25V
–20V
–0.3V to VDD + 0.3V
1.82W
18mW/°C
1.4W
14mW/°C
1.2W
12mW/°C
–55°C to +125°C
–65°C to +150°C
Note 1: For Inductive load applications.
Note 2: CMOS devices have input-static protection but are susceptible to
damage when exposed to extremely high static electrical
charges.
Typical Input Circuits
Typical Output Driver
STROBE
OUTPUT
ENABLE
V DD
V SS
CLOCK
SERIAL
DATA IN
V DD
V SS
K
OUT N
3K
V EE
SUB
Pin Description
Pin
(DIP & S.O.)
1,9
2
3
4
5
6
7
8
10
11—18
Name
Description
VEE
CLOCK
Substrate. Most Negative voltage in the system connects here.
Serial Data Clock. A CLEAR input must also be clocked into the latches.
SERIAL DATA IN Serial Data Input pin.
VSS
VDD
SERIAL DATA OUT
Logic reference (Ground) pin.
Logic Positive Supply voltage.
Serial Data Output pin. (Flow–through).
STROBE
Output Strobe pin. Loads output latches when high. Strobe is needed to clear latch.
OUTPUT
ENABLE/RESET
When Low, Outputs are active. When High, device is reset from a fault condition.
K
Transient suppression diode's cathode common pin.
OUTPUT N
Open Collector outputs 8 through 1.
7-50
October 1998
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