MICRF003 データシートの表示（PDF） - Micrel

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MICRF003

QwikRadio™ 900 MHz UHF Receiver

Micrel 

MICRF003

QwikRadio tm

Micrel

Functional Description

Please refer to “MICRF003 Block Diagram”. Identified in

the block diagram are the four principal functional blocks of

the IC, namely (1) UHF Downconverter, (2) OOK

Demodulator, (3) Reference and Control, and (4) Wakeup.

Also shown in the figure are two capacitors (CTH, CAGC)

and one timing component (CR), usually a ceramic

resonator. With the exception of a supply decoupling

capacitor, these are all the external components needed

with the MICRF003 to construct a complete UHF receiver.

Four control inputs are shown in the block diagram, SEL0,

SEL1, SWEN, and SHUT. Through these logic inputs the

user can control the operating mode and selectable features

of the IC. These inputs are CMOS compatible, and are

pulled-up on the IC.

application for a super-regenerative receiver is also an

application for the MICRF003 in SWP mode.]

For applications where the transmit frequency is accurately

set for other reasons (e.g., applications where a SAW

transmitter is used for its mechanical stability), the user

may choose to configure the MICRF003 as a standard

superheterodyne receiver (FIXED mode), mitigating the

aforementioned problem of a competing close-in signal.

This can be accomplished by tying SWEN to ground. Doing

so forces the on-chip LO frequency to a fixed value. In

FIXED mode, the ceramic resonator would be replaced with

a crystal. Generally, however, the MICRF003 can be

operated in SWP mode, using a ceramic resonator , with

either LC or CRYSTAL/SAW based transmitters, without

any significant range difference.

Input SWEN selects the operating mode of the IC (FIXED

mode or SWP mode). When low, the IC is in FIXED mode,

and functions as a conventional superheterodyne receiver.

When SWEN is high, the IC is in SWP mode. In this mode,

while the topology is still superheterodyne, the local

oscillator (LO) is deterministically swept over a range of

frequencies at rates greater than the data rate. When

coupled with a peak-detecting demodulator, this technique

effectively increases the RF bandwidth of the MICRF003, so

the device can operate in applications where significant

Transmitter/Receiver frequency misalignment may exist.

The inputs SEL0 and SEL1 control the Demodulator filter

bandwidth in four binary steps (750Hz-6000Hz in SWP,

2800Hz-22400Hz in FIXED mode), and the user must select

the bandwidth appropriate to his needs.

Rolloff response of the IF Filter is 5th order, while the

demodulator data filter exhibits a 2nd order response.

Multiplication factor between the REFOSC frequency Ft and

the internal Local Oscillator (LO) is 129X for FIXED mode,

and 128.5X for SWP mode (i.e., for Ft = 6.75MHz in FIXED

mode, LO frequency = 6.75MHz * 129 = 870.75MHz).

[Note: The swept LO technique does not affect the IF

bandwidth, so noise performance is not impacted relative to

FIXED mode. In other words, the IF bandwidth is the same

(1.18MHz) whether the device is in FIXED or SWP mode.]

Due to limitations imposed by the LO sweeping process, the

upper limit on data rate in SWP mode is approximately

5kbps. Data rates beyond 20kbps are possible in FIXED

mode however.

Examples of SWP mode operation include applications

which utilize low-cost LC-based transmitters, whose

transmit frequency may vary up to ± 0.5% over initial

tolerance, aging, and temperature. In this (patent-pending)

mode, the LO frequency is varied in a prescribed fashion

which results in downconversion of all signals in a band

approximately 1.5% around the transmit frequency. So the

Transmitter may drift up to ± 0.5% without the need to

retune the Receiver, and without impacting system

performance. Such performance is not achieved with

currently available crystal-based superheterodyne receivers,

which can operate only with SAW or crystal based

transmitters.

[Note: In SWP mode only, a range penalty will occur in

installations where there exists a competing signal of

sufficient strength in this small frequency band of 1.5%

around the transmit frequency. This results from the fact

that sweeping the LO indiscriminantly “sweeps” all signals

within the sweep range down into the IF band. This same

penalty also exists with super-regenerative type receivers,

as their RF bandwidth is also generally 1.5%. So any

Slicing Level and the CTH Capacitor

Extraction of the DC value of the demodulated signal for

purposes of logic-level data slicing is accomplished by

external capacitor CTH and the on-chip switched-cap

“resistor” RSC, indicated in the block diagram. The

effective resistance of RSC is 90kohms. The value of

capacitor CTH is easily calculated, once the slicing level

time-constant is chosen. Slicing Level time constant values

vary somewhat with decoder type, data pattern, and data

rate, but typical values range 5-50msec. Optimization of

the CTH value is required to maximize range, as discussed

in “Application Note TBD”.

During quiet periods (i.e., no signal transmissions) the Data

Output (DO pin) transitions randomly based on noise. This

may present problems for some decoders. The most

common solution is to introduce a small offset (“Squelch”)

on the CTH pin so that noise does not trigger the internal

comparator. Usually 20-30mV is sufficient, and may be

introduced by connecting a several-Megohm resistor from

the CTH pin to either VSS or VDD, depending on the

desired offset polarity. Since the MICRF003 is an AGC’d

receiver, noise at the internal comparator input is always

the same, set by the AGC. So the squelch offset

requirement does not change as the local “ether” noise

changes from installation to installation. Note that

introducing squelch will reduce range modestly, so only

introduce an amount sufficient to “quiet” the output.

AGC Function and the CAGC Capacitor

October 1999

8

MICRF003

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