MICRF219 データシートの表示（PDF） - Micrel
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MICRF219 Datasheet PDF : 23 Pages
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Micrel
Pin Configuration
MICRF219
RO1 1
GNDRF 2
ANT 3
GNDRF 4
Vdd 5
SQ 6
SEL0 7
SHDN 8
16 RO2
15 SCLK
14 RSSI
13 CAGC
12 CTH
11 SEL1
10 DO
9 GND
MICRF219AYQS
Pin Description
16-Pin
QSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name Pin Function
RO1
GNDRF
ANT
GNDRF
VDD
SQ
SEL0
SHDN
GND
DO
SEL1
CTH
CAGC
RSSI
SCLK
RO2
Reference Oscillator Input: Reference resonator input connection to pierce oscillator stage. May also
be driven by external reference signal of 200mVp-p to 1.5V p-p amplitude maximum. Internal
capacitance of 7pF to GND during normal operation.
Negative supply connection associated with ANT RF input.
Antenna Input: RF signal input from antenna. Internally AC coupled. It is recommended a matching
network with an inductor-to-RF ground be used to improve ESD protection.
Ground connection for ANT RF input.
Positive supply connection for all chip functions. Bypass with 0.1µF capacitor located as close to the
VDD pin as possible.
Squelch Control Logic-Level Input. An internal pull-up pulls the logic-input HIGH when the device is
enabled. Bit D17 sets whether squelch is enabled or disabled when a logic-level signal is applied the
SQ pin. See Squelch Enable Truth-Table on page
Demodulator Filter Bandwidth Select Logic-Level Input. Internal pull-up (3uA typical) when not in
shutdown or SLEEP mode. Used in conjunction with SEL1 to control D3 bandwidth LSB when serial
interface contains default setting. It does not need to be defined in SLEEP mode.
Shutdown control Logic-Level Input. A logic-level LOW enables the device. A logic-level HIGH places
the device in low-power shutdown mode. An internal pull-up pulls the logic input HIGH.
Negative supply connection for all chip functions except for RF input.
Data Input and Output. Demodulated data output. May be blanked until bit checking test is acceptable.
A current limited CMOS output during normal operation this pin is also used as a CMOS Schmitt input
for serial interface data. A 25kΩ pull-down is present when device is in shutdown and sleep modes.
Demodulator Filter Bandwidth Select Logic-Level Input: Internal (3uA typical) pull-up when not in
shutdown or SLEEP mode. Used in conjunction with SEL0, to control D4 bandwidth MSB, when serial
interface contains default setting. It does not need to be defined in SLEEP mode.
Demodulation threshold voltage integration capacitor. Capacitor-to-GND sets the settling time for the
demodulation data slicing level. Values above 1nF are recommended and should be optimized for data
rate and data profile.
AGC filter capacitor. A capacitor, normally greater than 0.47μF, is connected from this pin-to-GND
Received signal strength indication (output): Output is from a switched capacitor integrating op amp
with 220Ω typical output impedance.
Serial interface input clock. CMOS Schmitt input. A 25kΩ pull-down is present when device is in
shutdown mode.
Reference resonator connection. Internal capacitance of 7pF to GND during normal operation.
June 2011
2
M9999-060811
(408) 944-0800
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