ML2722 データシートの表示（PDF） - Micro Linear Corporation

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ML2722

900MHz Low-IF 1.5Mbps FSK Transceiver

Micro Linear Corporation 

MODE CONTROL AND INTERFACE LINES

1 XCEN

I (CMOS) Enables the bandgap reference and

VDD

voltage regulators when high. With

31

XCEN low the device consumes only

leakage current in STANDBY mode

when low. XCEN low also preserves

register contents and allows register

writes. This is a CMOS input, and the

thresholds are referenced to VDD and

XCEN 1

VSS.

RXON 2

DIN 30

ML2722

2 RXON

8

VSS

I (CMOS) Switches the transceiver between

VDD

TRANSMIT and RECEIVE modes.

31

Circuits are powered up and signal paths

reconfigured according to the operating

mode. This is a CMOS input, and the

thresholds are referenced to VDD and

VSS.

XCEN 1

RXON 2

DIN 30

3 PAON

O (CMOS)

Enables the off-chip PA at the correct

times in a Transmit slot. Goes high when

transmit RF is present at TRFO; goes low

5μs before transmit RF is removed from

TRFO. Has interlock logic to shut down

the PA if the PLL does not lock.

8

VSS

VDD

31

3 PAON

8 VSS

DS2722-F-06

FINAL DATASHEET

DECEMBER 2005 10

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