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ML6652EH データシートの表示(PDF) - Micro Linear Corporation

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ML6652EH Datasheet PDF : 28 Pages
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ML6652
PIN DESCRIPTIONS (continued)
Pin No. Signal Name
I/O
Description
8
PECLQU
I
The fiber interface is selected as shown in Table 3.
When using an LED driver and fiber optic receiver, this pin also defines the
maximum supported link distance.
When the 300m maximum link length is selected, the voltage thresholds for
Signal Detect are increased.
PECLQU
Voltage
0
1/3 of VCC
2/3 of VCC
VCC
Interfaces at PECLQU
FOINP/FOINN and <30.7>
IOUT/IOUT# Default
Quantizer andLED
0
Driver
PECL/LVPECL
1
Quantizer and LED
0
Driver
Quantizer and LED
0
Driver
Fiber Optic
Link Length
10BASE/100BASE
2Km/300m
PCB Traces
2Km/2Km
300m/300m
SHORTFO Wavelength
<30.5>
Default
0
850nm
0
NA
0
1300nm
1
850/1300nm
LONGWL
<30.6>
Default
0
0
1
0
Table 3.
25
DUPLEX
Note: The ML6652 fiber interface quantizer sensitivity can be adjusted via
Register 30 bits 5, 6 and 7 to accomodate various cable lengths and signal
intensity.
I
This input can have one of three levels: VCC, VCC/2 or 0 Volts. This input has
80kresistors internally connected to both VCC and Ground, generating VCC/
2 at the input if left unconnected. Settings defined by the DUPLEX power up
preset pin can be over written by the management interface. At power up the
DUPLEX pin causes the following default values to be written to management
register 30.
Note: this pin is typically read a few microseconds after power-up, if it is tied
to supplies that do not track the ML6652 power improper results will occur.
Use VCCD (pin 19) as the pull up point, do not add decoupling capacitors to
this input pin (without thoroughly understanding your PCB layout dynamics the
safest course is to make short connections and do not add decoupling
capacitors to this input pin).
DUPLEX Voltage
0
VCC/2
VCC
TRANSPARENT#
<30.11> Default
1
0
1
ADVERTFD#
<30.10> Default
1
0
0
ADVERTHD#
<30.15> Default
0
0
0
Table 4.
6
January 2004
Final Datasheet
DS6652-F-02

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