MIC8021-0001 データシートの表示（PDF） - Micrel
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MIC8021-0001 Datasheet PDF : 2 Pages
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MPD8021
Ordering Information
Part Number
Type Temperature Range
MIC8021-xxxx*
custom
–55°C to +125°C
MIC8021-0001
kit part
–55°C to +125°C
MIC8021-0002
kit part
–55°C to +125°C
* custom part number. Package markings customer specificed.
Package
customer specified
68-pin PLCC
68-pin PLCC
Micrel
MPD8021-0001 Kit Part
High-Voltage PWM Controller†
High-voltage push-pull output stages ................................ 6
with CMOS to high-voltage level shifters
and crossover protection logic
High-voltage charge pump for high-side drive
with integral high-side current mirror
Bandgap reference ............................................................ 1
with PTAT voltage output
(usable for thermal shutdown)
Op amp ............................................................................. 1
Comparators ..................................................................... 4
Floating logic input
Undervoltage lockout
† Digital cells and miscellaneous components are not accessible from
the pins of this device.
MPD8021-0002 Kit Part
High-Voltage Characterization Array‡
High-voltage NPN transistors ............................................ 4
(includes matching pair)
High-voltage PNP transistor .............................................. 1
High-voltage P-channel FETs ........................................... 2
Analog and digital low-voltage MOSFETs ......................... 8
Expitaxial JFET ................................................................. 1
200Ω and 10Ω high-voltage DMOS transistors ................. 3
6V and 12V Zener diodes ................................................. 2
Small Schottky diode ......................................................... 1
ESD input protection structures ........................................ 2
High-value resistor (100k) ................................................. 1
Low-value resistor (7.6k) ................................................... 1
Low-value polysilicon resistor ........................................... 1
‡ This device is suitable for curve tracer or bench-top characterization of
various device types included in the MPD8021 array. This device is a
supplement to the design information available in the Internet Design
Kit.
Absolute Maximum Ratings
DC Input Voltage
Negative, Any Pin (VIL), Note 1 .................. VSUB – 0.5V
DC Input Voltage
Positive ESD Pin (VIH), Note 2 ........................ V+ + 0.5V
Low-Voltage Supply Differential, Note 3 .................. +16.5V
DMOS Output Device Breakdown (BVDSS), Note 4 . +110V
DMOS Drain Current
Continuous (ID(max)), Note 5 .................................... 0.2A
Pulsed (ID(pulse)), Note 6 .......................................... 0.5A
DMOS Gate Drive Voltage (VGS(max)), Note 7 ............ ±20V
Standard ESD Structure Voltage (VESD), Note 8 .......... 2kV
Storage Temperature (TS) ....................... –65°C to +150°C
General Note: Devices are ESD protected; however, handling precau-
tions are recommended.
Note 1: VSUB is the substrate bias voltage.
Note 2: V+ is the positive ESD clamp potential, user specificed up to
+100V.
Note 3: Maximum voltage across low-voltage analog or digital MOS.
Note 4: DMOS source-to-body shorted to substrate at 0V.
Note 5: VGS = 15V.
Note 6: 5µs pulse, 10% duty cycle.
Note 7: Measured relative to source-to-body short.
Note 8: Measured between any two pins.
Operating Ratings
Ambient Temperature (TA) ....................... –55°C to +125°C
Electrical and Physical Summary
Bonding Pads .................................................................. 67
2kV ESD Pads ................................................................ 36
Die Size ............................................... 0.222 in. × 0.182 in.
CMOS Output Buffer Tiles .............................................. 12
CMOS Analog Tiles ......................................................... 13
High-Power DMOS ................................................ 12@10Ω
Bipolar Devices
split-collector PNP ....................................................... 14
NPN ............................................................................. 14
11 zener diodes ................................................................ 10
CMOS Logic Devices
NMOS ....................................................................... 354
PMOS ........................................................................ 354
Resistance
P-well ...................................................................... 1MΩ
N+ ............................................................................ 20kΩ
polysilicon .......................................................up to 50kΩ
Capacitance ................................................................ 45pF
Trimming Range ......................................................... 3 bits
1997
11-5
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