¡ Semiconductor
MSM6562B-xx
ELECTRICAL CHARACTERISTICS
DC Characteristics
Parameter
"H" input voltage
"L" input voltage
"H" input voltage
"L" input voltage
"H" output voltage
"L" output voltage
"H" output voltage
"L" output voltage
COM voltage drop
Symbol
VIH1
VIL1
VIH2
VIL2
VOH1
VOL1
VOH2
VOL2
VC
Condition
—
—
—
—
IO = –0.205mA
IO = 1.6mA
IO = –40mA
IO = 40mA
IO = ± 40mA
(Note 1)
Min.
2.2
–0.3
VDD – 0.8
–0.3
2.4
—
0.9VDD
—
(VDD = 4.5 to 5.5V, Ta = -30 to +85°C)
Typ. Max. Unit Applied Pin
—
VDD
V R/W, RS0, RS1, E,
—
0.6
V
DB0 - DB7
—
VDD
V
OSC1
—
0.8
V
SHL0, SHL1
—
—
V
—
0.4
V
DB0 - DB7
—
—
V
— 0.1VDD V
DO, CP, L,
DF, OSC2
—
—
2.3
V COM1 - COM16
SEG voltage drop
VS
IO = ± 40mA
(Note 1)
—
—
3.0
V
SEG1 - SEG100
Input leakage current
"H" input current
"L" input current
Supply current
IIL
VI = VDD
VI = VSS
—
—
VI = VDD
Except the current flowing
IIH2 to the pull-up resistor and
—
output driving MOS.
IIL2
VDD = 5.0V
VI = VSS
–34
VDD = 5.0V
E = "L" level, SHL0, SHL1 = "L" level
Built-in Rf oscillation or external
clock input to OSC1.
IDD
External clock frequency (fIN) is
270kHz.
—
R/W, RS0, RS1, and DB0 to DB7 are
open.
Output pins are all no load. Except
bias current for LCD driving.
(Note 2, 3, 4)
—
1
mA
—
–1
mA E, SHL0, SHL1
—
2
mA
R/W, RS0, RS1,
DB0 - DB7
–83 –204 mA
—
1
mA
VDD
LCD driving bias
resistance
LBR
—
VDD – V1, V1 – V2
2
4
8
kW V2 – V3', V3 – V4
V4 – V5
Variable range by built-in VLCD MAX
variable resistor for LCD
driving voltage
VLCD MIN
VDD = 5.0V, 1/5 bias
VDD = 5.0V, 1/5 bias
4.6
—
—
V VDD – V5 (V5')
—
—
3.7
LCD driving bias voltage VLCD1
(external input)
VLCD2
VDD – V5
(Note 5)
1/5 bias 3.0
—
5.5
V
VDD, V1, V2, V3,
V3', V4, V5
1/4 bias 3.0
—
5.5
6/50