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MSM7503GS-BK データシートの表示(PDF) - Oki Electric Industry

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MSM7503GS-BK
OKI
Oki Electric Industry OKI
MSM7503GS-BK Datasheet PDF : 41 Pages
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¡ Semiconductor
MSM7503
SPO
Output of pre-amplifier for speaker.
Since the driving capability is 2.4 VPP for the load of 20 kW, SPO can not directly drive a speaker.
During the whole system power down mode, SPO is at an analog ground level. During the whole
system power on mode, SPO is in a non-signal state (SG level), and a receive voice signal, R-tone,
F-tone, hold acknowledge tone, PB signal acknowledge tone, and sounder tone are output from
the speaker by processor control.
When the speaker is used as a sounder, the sounder tone is output via the SPO pin by connecting
the SPI input with the sounder output (SA0 or SA1). In addition, when the AD-converted
sounder tone is sent from the main device, the sounder tone is output via the SPO pin since the
CAO pin for CODEC output is internally connected.
R1I, R2I, RPO
R1I and R2I are for the inputs and RPO is for the output of the receive pre-amplifier.
Normally, R1I is connected via an AC-coupling capacitor to the CODEC analog output (CAO),
and R2I is used as the mixing signal input pin.
The typical gain between R1I and PRO is –6 dB. Through processor control, gains are variable
from –14 dB to 0 dB in 2 dB steps. In addition, the receive pad can control the gain of –9, –6, –3,
or 0 dB. The gain between R2I and RPO is fixed to 0 dB.
During the whole system power-on mode, the RPO output is in non-signal state, and speech
signal, R-tone, F-tone, PB acknowledge tone, side tone signal are output by processor control.
During the whole system power-down mode, the RPO output is the analog ground level.
The input resistance of R1I is typically between 20 kW and 100 kW (it varies by gain setting). The
input resistance of R2I is typically 20 kW.
MLDYI
Hold tone signal input.
For example, the output of external melody IC is connected to this pin. Through processor
control, the signal applied to MLDYI is output from the TO output pin as a hold tone on the
transmit path, and from the SPO output pin as a hold acknowledge tone on the receive path. The
typical gain between MLDYI and TO is –2 dB. Through processor control, a gain between –2 dB
and –11 dB is also settable at 3 dB steps. The typical gain between MLDYI and SPO is –3 dB.
Through processor control, a gain between –3 dB to –31 dB is also settable at 4 dB steps. MLDYI
is a high impedance input, so insert an about 100 kW bias resistor between MLDYI and SGT.
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