MSM7541GS-K データシートの表示（PDF） - Oki Electric Industry

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MSM7541GS-K

Single Rail CODEC

Oki Electric Industry 

¡ Semiconductor

MSM7541/7542

RSYNC

Receive synchronizing signal input.

Eight required bits are selected from serial PCM signals on the PCMIN pin by the receive

synchronizing signal.

Signals in the receive section are synchronized by this synchronizing signal. This signal must be

synchronized in phase with the BCLOCK. The frequency should be 8 kHz ±50 ppm to guarantee

the AC characteristics which are mainly the frequency characteristics of the receive section.

However, if the frequency characteristic of an applied system is not specified exactly, this device

can operate in the range of 8 kHz ±2 kHz, but the electrical characteristics in this specification are

not guaranteed.

XSYNC

Transmit synchronizing signal input.

The PCM output signal from the PCMOUT pin is output in synchronization with this transmit

synchronizing signal. This synchronizing signal triggers the PLL and synchronizes all timing

signals of the transmit section.

This synchronizing signal must be synchronized in phase with BCLOCK.

The frequency should be 8 kHz ±50 ppm to guarantee the AC characteristics which are mainly

the frequency characteristics of the transmit section.

However, if the frequency characteristic of an applied system is not specified exactly, this device

can operate in the range of 8 kHz ±2 kHz, but the electrical characteristics in this specification are

not guaranteed.

Setting this signal to logic "1" or "0" drives both transmit and receive circuits to the power saving

state.

TMC

Control signal input for mode selection.

This pin select the normal operating mode or the analog loop-back mode.

In the analog loop-back mode, the receive filter output is connected to the transmit filter input

and the digital signal input to the PCMIN pin is converted from a digital to an analog signal (D/

A conversion). Next, the analog signal is converted to a digital signal (A/D conversion) through

the receive filter and transmit filter. The result is output to the PCMOUT pin.

When in the analog loop-back mode, the VFRO pin outputs the SG level. (signal ground)

TMC Input

< 0.16 ¥ VDD

> 0.45 ¥ VDD

Mode

Normal operation

Analog loop-back

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