DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

MSM7578VMS-K データシートの表示(PDF) - Oki Electric Industry

部品番号
コンポーネント説明
メーカー
MSM7578VMS-K
OKI
Oki Electric Industry OKI
MSM7578VMS-K Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
¡ Semiconductor
ABSOLUTE MAXIMUM RATINGS
Parameter
Power Supply Voltage
Analog Input Voltage
Digital Input Voltage
Storage Temperature
Symbol
VDD
VAIN
VDIN
TSTG
Condition
MSM7578H/7578V/7579
Rating
Unit
0 to 7
V
–0.3 to VDD + 0.3
V
–0.3 to VDD + 0.3
V
–55 to +150
°C
RECOMMENDED OPERATING CONDITIONS
Parameter
Power Supply Voltage
Operating Temperature
Analog Input Voltage
Symbol
Condition
VDD Voltage must be fixed
Ta
VAIN Connect AIN– and GSX
Min.
4.75
–30
Typ.
5
+25
Max. Unit
5.25 V
+85 °C
2.4
VPP
Input High Voltage
Input Low Voltage
VIH XSYNC, RSYNC, BCLK,
PCMIN, PDN, ALAW
VIL
2.2
VDD
V
0
0.8
V
64, 128, 256, 512, 1024,
Clock Frequency
FC BCLK
2048, 96, 192, 384, 768,
kHz
1536, 1544, 200
Sync Pulse Frequency
FS XSYNC, RSYNC
6.0
8.0
9.0 kHz
Clock Duty Ratio
DC BCLK
40
50
60
%
Digital Input Rise Time
tIr XSYNC, RSYNC, BCLK,
50
ns
Digital Input Fall Time
tIf PCMIN, PDN, ALAW
50
ns
Transmit Sync Pulse Setting Time tXS BCLKÆXSYNC, See Timing Diagram 100
tSX XSYNCÆBCLK, See Timing Diagram 100
ns
ns
Receive Sync Pulse Setting Time
tRS BCLKÆRSYNC, See Timing Diagram 100
tSR RSYNCÆBCLK, See Timing Diagram 100
ns
ns
Sync Pulse Width
tWS XSYNC, RSYNC
1 BCLK —
100 ms
PCMIN Set-up Time
tDS
100
ns
PCMIN Hold Time
tDH
100
ns
Digital Output Load
RDL Pull-up resistor
CDL
0.5
— kW
100 pF
Transmit gain stage, Gain= 1 –100
+100 mV
Analog Input Allowable DC Offset Voff Transmit gain stage, Gain = 10 –10
+10 mV
Allowable Jitter Width
— XSYNC, RSYNC, BCLK
1
ms
8/18

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]