MSM9210 データシートの表示（PDF） - Oki Electric Industry

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MSM9210

32-Bit Duplex/Triplex (1/2 duty / 1/3 duty) VF Controller/Driver with Digital Dimming

Oki Electric Industry 

¡ Semiconductor

MSM9210

PIN DESCRIPTIONS

Symbol

VDISP

VDD

D-GND

L-GND

SEG1 to 22

SEG23 to 32

GRID1 to 3

CS

CLOCK

DATA IN

DUP/TRI

M/S

DIM IN

Pin

Type

QFP56 QFP64

Description

43,56

49,64

— Power supply pins for VFD driver circuit.

43 pin and 56 pin should be connected externally.

14

15

— Power supply pin for logic drive.

12, 49

21

13, 56

24

— D-GND is ground pin for the VFD driver circuit. L-GND is ground

pin for the logic circuit. 12pin, 21pin and 49pin should be

— connected externally.

30 to 42,

44 to 48,

50 to 53

34 to 46,

51 to 55,

57 to 60

Segment (anode) signal output pins for a VFD tube.

O These pins can be directly connected to the VFD tube.

External circuit is not required.

IOH£–5 mA

Segment (anode) signal output pins for a VFD tube.

1 to 8,

54, 55

2 to 9,

61, 62

O These pins can be directly connected to the VFD tube.

External circuit is not required.

IOH£–10 mA

Inverted Grid signal output pins.

9, 10, 11 10, 11, 12 O For pre-driver, the external circuit is required.

IOL£10 mA

18

21

I Chip select input pin.

Data is not transferred when CS is set to a Low level.

19

22

I Shift clock input pin.

Serial data shifts at the rising edge of the CLOCK.

20

23

I Serial data input pin (positive logic).

Data is input to the shift register at the rising edge of the CLOCK signal.

Duplex/Triplex operation select input pin.

24

27

I Duplex (1/2 duty) operation is selected when this pin is set to VDD.

Triplex (1/3 duty) operation is selected when this pin is set to L-GND.

Master/Slave mode select input pin.

25

28

I Master mode is selected when this pin is set to VDD.

Slave mode is selected when this pin is set to L-GND.

Dimming pulse input.

When the slave mode is selected, the pulse width of the all segment

output are controlled by a input pulse width of DIM IN.

Connect this pin to the master side DIM OUT pin at the slave mode.

15

18

I When the master mode is selected, the input level of this pin is

ignored and the pulse width of the all grids and segment outputs are

controlled by a built-in 10-bit dimming circuit.

Connect this pin to VDD or L-GND at the master mode.

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